word-at-a-time: provide generic big-endian zero_bytemask implementation
Whilst architectures may be able to do better than this (which they can, by simply defining their own macro), this is a generic stab at a zero_bytemask implementation for the asm-generic, big-endian word-at-a-time implementation. On arm64, a clz instruction is used to implement the fls efficiently. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -49,4 +49,12 @@ static inline bool has_zero(unsigned long val, unsigned long *data, const struct
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return (val + c->high_bits) & ~rhs;
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}
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#ifndef zero_bytemask
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#ifdef CONFIG_64BIT
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#define zero_bytemask(mask) (~0ul << fls64(mask))
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#else
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#define zero_bytemask(mask) (~0ul << fls(mask))
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#endif /* CONFIG_64BIT */
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#endif /* zero_bytemask */
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#endif /* _ASM_WORD_AT_A_TIME_H */
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