clk: rockchip: fix rk3066 pll status register location
The register providing the pll lock status is at a different address on the rk3066. The error became apparent while working on cpufreq support for the rockchip SoCs. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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@ -19,6 +19,7 @@
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#include <dt-bindings/clock/rk3188-cru-common.h>
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#include <dt-bindings/clock/rk3188-cru-common.h>
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#include "clk.h"
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#include "clk.h"
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#define RK3066_GRF_SOC_STATUS 0x15c
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#define RK3188_GRF_SOC_STATUS 0xac
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#define RK3188_GRF_SOC_STATUS 0xac
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enum rk3188_plls {
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enum rk3188_plls {
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@ -629,9 +630,6 @@ static void __init rk3188_common_clk_init(struct device_node *np)
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pr_warn("%s: could not register clock usb480m: %ld\n",
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pr_warn("%s: could not register clock usb480m: %ld\n",
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__func__, PTR_ERR(clk));
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__func__, PTR_ERR(clk));
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rockchip_clk_register_plls(rk3188_pll_clks,
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ARRAY_SIZE(rk3188_pll_clks),
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RK3188_GRF_SOC_STATUS);
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rockchip_clk_register_branches(common_clk_branches,
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rockchip_clk_register_branches(common_clk_branches,
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ARRAY_SIZE(common_clk_branches));
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ARRAY_SIZE(common_clk_branches));
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rockchip_clk_protect_critical(rk3188_critical_clocks,
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rockchip_clk_protect_critical(rk3188_critical_clocks,
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@ -644,6 +642,9 @@ static void __init rk3188_common_clk_init(struct device_node *np)
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static void __init rk3066a_clk_init(struct device_node *np)
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static void __init rk3066a_clk_init(struct device_node *np)
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{
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{
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rk3188_common_clk_init(np);
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rk3188_common_clk_init(np);
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rockchip_clk_register_plls(rk3188_pll_clks,
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ARRAY_SIZE(rk3188_pll_clks),
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RK3066_GRF_SOC_STATUS);
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rockchip_clk_register_branches(rk3066a_clk_branches,
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rockchip_clk_register_branches(rk3066a_clk_branches,
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ARRAY_SIZE(rk3066a_clk_branches));
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ARRAY_SIZE(rk3066a_clk_branches));
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}
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}
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@ -652,6 +653,9 @@ CLK_OF_DECLARE(rk3066a_cru, "rockchip,rk3066a-cru", rk3066a_clk_init);
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static void __init rk3188a_clk_init(struct device_node *np)
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static void __init rk3188a_clk_init(struct device_node *np)
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{
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{
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rk3188_common_clk_init(np);
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rk3188_common_clk_init(np);
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rockchip_clk_register_plls(rk3188_pll_clks,
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ARRAY_SIZE(rk3188_pll_clks),
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RK3188_GRF_SOC_STATUS);
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rockchip_clk_register_branches(rk3188_clk_branches,
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rockchip_clk_register_branches(rk3188_clk_branches,
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ARRAY_SIZE(rk3188_clk_branches));
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ARRAY_SIZE(rk3188_clk_branches));
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}
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}
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