MIPS: Adjust set_pte() SMP fix to handle R10000_LLSC_WAR
Update the recent changes to set_pte() that were added in46011e6ea3
to handle R10000_LLSC_WAR, and format the assembly to match other areas of the MIPS tree using the same WAR. This also incorporates a patch recently sent in my Markos Chandras, "Remove local LL/SC preprocessor variants", so that patch doesn't need to be applied if this one is accepted. Signed-off-by: Joshua Kinard <kumba@gentoo.org> Fixes:46011e6ea3
("MIPS: Make set_pte() SMP safe.) Cc: David Daney <david.daney@cavium.com> Cc: Linux/MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/11103/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -190,20 +190,39 @@ static inline void set_pte(pte_t *ptep, pte_t pteval)
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unsigned long page_global = _PAGE_GLOBAL;
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unsigned long tmp;
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__asm__ __volatile__ (
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" .set push\n"
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" .set noreorder\n"
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"1: " __LL " %[tmp], %[buddy]\n"
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" bnez %[tmp], 2f\n"
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" or %[tmp], %[tmp], %[global]\n"
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" " __SC " %[tmp], %[buddy]\n"
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" beqz %[tmp], 1b\n"
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" nop\n"
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"2:\n"
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" .set pop"
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: [buddy] "+m" (buddy->pte),
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[tmp] "=&r" (tmp)
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if (kernel_uses_llsc && R10000_LLSC_WAR) {
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__asm__ __volatile__ (
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" .set arch=r4000 \n"
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" .set push \n"
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" .set noreorder \n"
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"1:" __LL "%[tmp], %[buddy] \n"
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" bnez %[tmp], 2f \n"
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" or %[tmp], %[tmp], %[global] \n"
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__SC "%[tmp], %[buddy] \n"
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" beqzl %[tmp], 1b \n"
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" nop \n"
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"2: \n"
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" .set pop \n"
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" .set mips0 \n"
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: [buddy] "+m" (buddy->pte), [tmp] "=&r" (tmp)
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: [global] "r" (page_global));
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} else if (kernel_uses_llsc) {
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__asm__ __volatile__ (
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" .set "MIPS_ISA_ARCH_LEVEL" \n"
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" .set push \n"
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" .set noreorder \n"
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"1:" __LL "%[tmp], %[buddy] \n"
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" bnez %[tmp], 2f \n"
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" or %[tmp], %[tmp], %[global] \n"
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__SC "%[tmp], %[buddy] \n"
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" beqz %[tmp], 1b \n"
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" nop \n"
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"2: \n"
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" .set pop \n"
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" .set mips0 \n"
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: [buddy] "+m" (buddy->pte), [tmp] "=&r" (tmp)
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: [global] "r" (page_global));
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}
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#else /* !CONFIG_SMP */
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if (pte_none(*buddy))
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pte_val(*buddy) = pte_val(*buddy) | _PAGE_GLOBAL;
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