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sata_mv: workaround errata SATA#13 

Add remainder of workaround for errata SATA#13.

This prevents writes of certain adjacent 32-bit registers
from being combined into single 64-bit writes, which might
fail for the affected registers.

Most of sata_mv is already safe from this issue,
but adding this code to mv_write_cached_reg() will
catch the remaining cases and hopefully prevent future ones.

Signed-off-by: Mark Lord <mlord@pobox.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
hifive-unleashed-5.1
Mark Lord 2009-04-06 15:26:24 -04:00 committed by Jeff Garzik
parent ba68460b8e
commit 12f3b6d755
1 changed files with 19 additions and 1 deletions
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20
drivers/ata/sata_mv.c
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@ -919,8 +919,26 @@ static void mv_save_cached_regs(struct ata_port *ap)
static inline void mv_write_cached_reg(void __iomem *addr, u32 *old, u32 new)
{
if (new != *old) {
unsigned long laddr;
*old = new;
writel(new, addr);
/*
* Workaround for 88SX60x1-B2 FEr SATA#13:
* Read-after-write is needed to prevent generating 64-bit
* write cycles on the PCI bus for SATA interface registers
* at offsets ending in 0x4 or 0xc.
*
* Looks like a lot of fuss, but it avoids an unnecessary
* +1 usec read-after-write delay for unaffected registers.
*/
laddr = (long)addr & 0xffff;
if (laddr >= 0x300 && laddr <= 0x33c) {
laddr &= 0x000f;
if (laddr == 0x4 || laddr == 0xc) {
writelfl(new, addr); /* read after write */
return;
}
}
writel(new, addr); /* unaffected by the errata */
}
}