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pinctrl: qcom: ipq4019: add open drain support 

[ Brian: adapted from from the Chromium OS kernel used on IPQ4019-based
  WiFi APs. ]

Signed-off-by: Jaiganesh Narayanan <njaigane@codeaurora.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Link: https://lore.kernel.org/r/20200703080646.23233-1-computersforpeace@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
zero-sugar-mainline-defconfig
Jaiganesh Narayanan 2020-07-03 01:06:45 -07:00 committed by Linus Walleij
parent 13c502c863
commit 13355ca35c
3 changed files with 16 additions and 0 deletions
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1
drivers/pinctrl/qcom/pinctrl-ipq4019.c
View File

@ -254,6 +254,7 @@ DECLARE_QCA_GPIO_PINS(99);
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
.od_bit = 12, \
.oe_bit = 9, \
.in_bit = 0, \
.out_bit = 1, \

13
drivers/pinctrl/qcom/pinctrl-msm.c
View File

@ -233,6 +233,10 @@ static int msm_config_reg(struct msm_pinctrl *pctrl,
*bit = g->pull_bit;
*mask = 3;
break;
case PIN_CONFIG_DRIVE_OPEN_DRAIN:
*bit = g->od_bit;
*mask = 1;
break;
case PIN_CONFIG_DRIVE_STRENGTH:
*bit = g->drv_bit;
*mask = 7;
@ -310,6 +314,12 @@ static int msm_config_group_get(struct pinctrl_dev *pctldev,
if (!arg)
return -EINVAL;
break;
case PIN_CONFIG_DRIVE_OPEN_DRAIN:
/* Pin is not open-drain */
if (!arg)
return -EINVAL;
arg = 1;
break;
case PIN_CONFIG_DRIVE_STRENGTH:
arg = msm_regval_to_drive(arg);
break;
@ -382,6 +392,9 @@ static int msm_config_group_set(struct pinctrl_dev *pctldev,
else
arg = MSM_PULL_UP;
break;
case PIN_CONFIG_DRIVE_OPEN_DRAIN:
arg = 1;
break;
case PIN_CONFIG_DRIVE_STRENGTH:
/* Check for invalid values */
if (arg > 16 || arg < 2 || (arg % 2) != 0)

2
drivers/pinctrl/qcom/pinctrl-msm.h
View File

@ -38,6 +38,7 @@ struct msm_function {
* @mux_bit: Offset in @ctl_reg for the pinmux function selection.
* @pull_bit: Offset in @ctl_reg for the bias configuration.
* @drv_bit: Offset in @ctl_reg for the drive strength configuration.
* @od_bit: Offset in @ctl_reg for controlling open drain.
* @oe_bit: Offset in @ctl_reg for controlling output enable.
* @in_bit: Offset in @io_reg for the input bit value.
* @out_bit: Offset in @io_reg for the output bit value.
@ -75,6 +76,7 @@ struct msm_pingroup {
unsigned pull_bit:5;
unsigned drv_bit:5;
unsigned od_bit:5;
unsigned oe_bit:5;
unsigned in_bit:5;
unsigned out_bit:5;