firmware: tegra: add bpmp driver for Tegra210
This patch adds driver for Tegra210 BPMP firmware. The BPMP is a specific processor in Tegra210 chip, which runs firmware for assisting in entering deep low power states (suspend to ram), and offloading DRAM memory clock scaling on some platforms. Based on work by Sivaram Nair <sivaramn@nvidia.com> Signed-off-by: Timo Alho <talho@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>hifive-unleashed-5.1
Timo Alho
Thierry Reding
parent
cdfa358b24
commit
139251fc22
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@ -1,4 +1,5 @@
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tegra-bpmp-y = bpmp.o
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tegra-bpmp-$(CONFIG_ARCH_TEGRA_210_SOC) += bpmp-tegra210.o
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tegra-bpmp-$(CONFIG_ARCH_TEGRA_186_SOC) += bpmp-tegra186.o
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tegra-bpmp-$(CONFIG_DEBUG_FS) += bpmp-debugfs.o
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obj-$(CONFIG_TEGRA_BPMP) += tegra-bpmp.o
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@ -24,5 +24,6 @@ struct tegra_bpmp_ops {
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};
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extern const struct tegra_bpmp_ops tegra186_bpmp_ops;
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extern const struct tegra_bpmp_ops tegra210_bpmp_ops;
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#endif
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@ -0,0 +1,243 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2018, NVIDIA CORPORATION.
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*/
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <soc/tegra/bpmp.h>
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#include "bpmp-private.h"
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#define TRIGGER_OFFSET 0x000
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#define RESULT_OFFSET(id) (0xc00 + id * 4)
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#define TRIGGER_ID_SHIFT 16
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#define TRIGGER_CMD_GET 4
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#define STA_OFFSET 0
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#define SET_OFFSET 4
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#define CLR_OFFSET 8
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#define CH_MASK(ch) (0x3 << ((ch) * 2))
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#define SL_SIGL(ch) (0x0 << ((ch) * 2))
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#define SL_QUED(ch) (0x1 << ((ch) * 2))
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#define MA_FREE(ch) (0x2 << ((ch) * 2))
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#define MA_ACKD(ch) (0x3 << ((ch) * 2))
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struct tegra210_bpmp {
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void __iomem *atomics;
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void __iomem *arb_sema;
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struct irq_data *tx_irq_data;
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};
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static u32 bpmp_channel_status(struct tegra_bpmp *bpmp, unsigned int index)
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{
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struct tegra210_bpmp *priv = bpmp->priv;
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return __raw_readl(priv->arb_sema + STA_OFFSET) & CH_MASK(index);
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}
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static bool tegra210_bpmp_is_response_ready(struct tegra_bpmp_channel *channel)
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{
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unsigned int index = channel->index;
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return bpmp_channel_status(channel->bpmp, index) == MA_ACKD(index);
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}
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static bool tegra210_bpmp_is_request_ready(struct tegra_bpmp_channel *channel)
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{
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unsigned int index = channel->index;
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return bpmp_channel_status(channel->bpmp, index) == SL_SIGL(index);
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}
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static bool
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tegra210_bpmp_is_request_channel_free(struct tegra_bpmp_channel *channel)
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{
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unsigned int index = channel->index;
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return bpmp_channel_status(channel->bpmp, index) == MA_FREE(index);
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}
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static bool
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tegra210_bpmp_is_response_channel_free(struct tegra_bpmp_channel *channel)
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{
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unsigned int index = channel->index;
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return bpmp_channel_status(channel->bpmp, index) == SL_QUED(index);
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}
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static int tegra210_bpmp_post_request(struct tegra_bpmp_channel *channel)
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{
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struct tegra210_bpmp *priv = channel->bpmp->priv;
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__raw_writel(CH_MASK(channel->index), priv->arb_sema + CLR_OFFSET);
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return 0;
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}
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static int tegra210_bpmp_post_response(struct tegra_bpmp_channel *channel)
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{
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struct tegra210_bpmp *priv = channel->bpmp->priv;
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__raw_writel(MA_ACKD(channel->index), priv->arb_sema + SET_OFFSET);
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return 0;
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}
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static int tegra210_bpmp_ack_response(struct tegra_bpmp_channel *channel)
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{
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struct tegra210_bpmp *priv = channel->bpmp->priv;
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__raw_writel(MA_ACKD(channel->index) ^ MA_FREE(channel->index),
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priv->arb_sema + CLR_OFFSET);
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return 0;
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}
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static int tegra210_bpmp_ack_request(struct tegra_bpmp_channel *channel)
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{
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struct tegra210_bpmp *priv = channel->bpmp->priv;
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__raw_writel(SL_QUED(channel->index), priv->arb_sema + SET_OFFSET);
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return 0;
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}
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static int tegra210_bpmp_ring_doorbell(struct tegra_bpmp *bpmp)
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{
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struct tegra210_bpmp *priv = bpmp->priv;
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struct irq_data *irq_data = priv->tx_irq_data;
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/*
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* Tegra Legacy Interrupt Controller (LIC) is used to notify BPMP of
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* available messages
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*/
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if (irq_data->chip->irq_retrigger)
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return irq_data->chip->irq_retrigger(irq_data);
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return -EINVAL;
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}
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static irqreturn_t rx_irq(int irq, void *data)
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{
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struct tegra_bpmp *bpmp = data;
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tegra_bpmp_handle_rx(bpmp);
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return IRQ_HANDLED;
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}
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static int tegra210_bpmp_channel_init(struct tegra_bpmp_channel *channel,
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struct tegra_bpmp *bpmp,
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unsigned int index)
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{
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struct tegra210_bpmp *priv = bpmp->priv;
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u32 address;
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void *p;
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/* Retrieve channel base address from BPMP */
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writel(index << TRIGGER_ID_SHIFT | TRIGGER_CMD_GET,
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priv->atomics + TRIGGER_OFFSET);
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address = readl(priv->atomics + RESULT_OFFSET(index));
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p = devm_ioremap(bpmp->dev, address, 0x80);
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if (!p)
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return -ENOMEM;
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channel->ib = p;
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channel->ob = p;
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channel->index = index;
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init_completion(&channel->completion);
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channel->bpmp = bpmp;
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return 0;
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}
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static int tegra210_bpmp_init(struct tegra_bpmp *bpmp)
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{
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struct platform_device *pdev = to_platform_device(bpmp->dev);
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struct tegra210_bpmp *priv;
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struct resource *res;
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unsigned int i;
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int err;
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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bpmp->priv = priv;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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priv->atomics = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(priv->atomics))
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return PTR_ERR(priv->atomics);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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priv->arb_sema = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(priv->arb_sema))
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return PTR_ERR(priv->arb_sema);
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err = tegra210_bpmp_channel_init(bpmp->tx_channel, bpmp,
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bpmp->soc->channels.cpu_tx.offset);
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if (err < 0)
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return err;
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err = tegra210_bpmp_channel_init(bpmp->rx_channel, bpmp,
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bpmp->soc->channels.cpu_rx.offset);
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if (err < 0)
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return err;
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for (i = 0; i < bpmp->threaded.count; i++) {
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unsigned int index = bpmp->soc->channels.thread.offset + i;
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err = tegra210_bpmp_channel_init(&bpmp->threaded_channels[i],
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bpmp, index);
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if (err < 0)
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return err;
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}
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err = platform_get_irq_byname(pdev, "tx");
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if (err < 0) {
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dev_err(&pdev->dev, "failed to get TX IRQ: %d\n", err);
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return err;
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}
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priv->tx_irq_data = irq_get_irq_data(err);
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if (!priv->tx_irq_data) {
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dev_err(&pdev->dev, "failed to get IRQ data for TX IRQ\n");
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return err;
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}
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err = platform_get_irq_byname(pdev, "rx");
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if (err < 0) {
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dev_err(&pdev->dev, "failed to get rx IRQ: %d\n", err);
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return err;
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}
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err = devm_request_irq(&pdev->dev, err, rx_irq,
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IRQF_NO_SUSPEND, dev_name(&pdev->dev), bpmp);
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if (err < 0) {
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dev_err(&pdev->dev, "failed to request IRQ: %d\n", err);
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return err;
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}
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return 0;
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}
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const struct tegra_bpmp_ops tegra210_bpmp_ops = {
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.init = tegra210_bpmp_init,
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.is_response_ready = tegra210_bpmp_is_response_ready,
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.is_request_ready = tegra210_bpmp_is_request_ready,
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.ack_response = tegra210_bpmp_ack_response,
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.ack_request = tegra210_bpmp_ack_request,
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.is_response_channel_free = tegra210_bpmp_is_response_channel_free,
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.is_request_channel_free = tegra210_bpmp_is_request_channel_free,
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.post_response = tegra210_bpmp_post_response,
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.post_request = tegra210_bpmp_post_request,
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.ring_doorbell = tegra210_bpmp_ring_doorbell,
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};
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@ -768,17 +768,23 @@ static int tegra_bpmp_probe(struct platform_device *pdev)
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if (err < 0)
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goto free_mrq;
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err = tegra_bpmp_init_clocks(bpmp);
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if (err < 0)
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goto free_mrq;
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if (of_find_property(pdev->dev.of_node, "#clock-cells", NULL)) {
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err = tegra_bpmp_init_clocks(bpmp);
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if (err < 0)
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goto free_mrq;
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}
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err = tegra_bpmp_init_resets(bpmp);
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if (err < 0)
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goto free_mrq;
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if (of_find_property(pdev->dev.of_node, "#reset-cells", NULL)) {
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err = tegra_bpmp_init_resets(bpmp);
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if (err < 0)
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goto free_mrq;
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}
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err = tegra_bpmp_init_powergates(bpmp);
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if (err < 0)
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goto free_mrq;
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if (of_find_property(pdev->dev.of_node, "#power-domain-cells", NULL)) {
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err = tegra_bpmp_init_powergates(bpmp);
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if (err < 0)
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goto free_mrq;
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}
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err = tegra_bpmp_init_debugfs(bpmp);
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if (err < 0)
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@ -827,8 +833,30 @@ static const struct tegra_bpmp_soc tegra186_soc = {
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.num_resets = 193,
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};
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static const struct tegra_bpmp_soc tegra210_soc = {
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.channels = {
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.cpu_tx = {
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.offset = 0,
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.count = 1,
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.timeout = 60 * USEC_PER_SEC,
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},
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.thread = {
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.offset = 4,
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.count = 1,
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.timeout = 600 * USEC_PER_SEC,
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},
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.cpu_rx = {
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.offset = 8,
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.count = 1,
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.timeout = 0,
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},
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},
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.ops = &tegra210_bpmp_ops,
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};
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static const struct of_device_id tegra_bpmp_match[] = {
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{ .compatible = "nvidia,tegra186-bpmp", .data = &tegra186_soc },
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{ .compatible = "nvidia,tegra210-bpmp", .data = &tegra210_soc },
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{ }
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};
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@ -50,6 +50,7 @@ struct tegra_bpmp_channel {
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struct tegra_bpmp_mb_data *ob;
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struct completion completion;
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struct tegra_ivc *ivc;
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unsigned int index;
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};
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typedef void (*tegra_bpmp_mrq_handler_t)(unsigned int mrq,
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