iwlwifi: move all uCode load variables
All variables related to uCode loading (the waitqueue and done indication) should be in the PCI-E transport's private data as this is transport specific. Move them there. Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -367,7 +367,7 @@ struct iwl_cfg {
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* @nic: pointer to the nic data
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* @hw_params: see struct iwl_hw_params
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* @lock: protect general shared data
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* @wait_command_queue: the wait_queue for SYNC host command nad uCode load
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* @wait_command_queue: the wait_queue for SYNC host commands
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* @eeprom: pointer to the eeprom/OTP image
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* @ucode_type: indicator of loaded ucode image
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* @device_pointers: pointers to ucode event tables
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@ -32,6 +32,7 @@
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#include <linux/spinlock.h>
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#include <linux/interrupt.h>
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#include <linux/skbuff.h>
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#include <linux/wait.h>
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#include <linux/pci.h>
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#include "iwl-fh.h"
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@ -243,6 +244,8 @@ struct iwl_tx_queue {
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* queue_stop_count: tracks what SW queue is stopped
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* @pci_dev: basic pci-network driver stuff
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* @hw_base: pci hardware address support
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* @ucode_write_complete: indicates that the ucode has been copied.
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* @ucode_write_waitq: wait queue for uCode load
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*/
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struct iwl_trans_pcie {
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struct iwl_rx_queue rxq;
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@ -279,6 +282,9 @@ struct iwl_trans_pcie {
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/* PCI bus related data */
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struct pci_dev *pci_dev;
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void __iomem *hw_base;
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bool ucode_write_complete;
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wait_queue_head_t ucode_write_waitq;
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};
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#define IWL_TRANS_GET_PCIE_TRANS(_iwl_trans) \
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@ -1114,8 +1114,8 @@ void iwl_irq_tasklet(struct iwl_trans *trans)
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isr_stats->tx++;
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handled |= CSR_INT_BIT_FH_TX;
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/* Wake up uCode load routine, now that load is complete */
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trans->ucode_write_complete = 1;
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wake_up(&trans->shrd->wait_command_queue);
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trans_pcie->ucode_write_complete = true;
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wake_up(&trans_pcie->ucode_write_waitq);
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}
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if (inta & ~handled) {
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@ -947,11 +947,12 @@ static const u8 iwlagn_pan_ac_to_queue[] = {
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static int iwl_load_section(struct iwl_trans *trans, const char *name,
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const struct fw_desc *image, u32 dst_addr)
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{
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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dma_addr_t phy_addr = image->p_addr;
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u32 byte_cnt = image->len;
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int ret;
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trans->ucode_write_complete = 0;
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trans_pcie->ucode_write_complete = false;
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iwl_write_direct32(trans,
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FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
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@ -982,8 +983,8 @@ static int iwl_load_section(struct iwl_trans *trans, const char *name,
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FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD);
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IWL_DEBUG_FW(trans, "%s uCode section being loaded...\n", name);
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ret = wait_event_timeout(trans->shrd->wait_command_queue,
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trans->ucode_write_complete, 5 * HZ);
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ret = wait_event_timeout(trans_pcie->ucode_write_waitq,
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trans_pcie->ucode_write_complete, 5 * HZ);
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if (!ret) {
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IWL_ERR(trans, "Could not load the %s uCode section\n",
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name);
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@ -2255,6 +2256,7 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct iwl_shared *shrd,
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trans->shrd = shrd;
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trans_pcie->trans = trans;
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spin_lock_init(&trans_pcie->irq_lock);
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init_waitqueue_head(&trans_pcie->ucode_write_waitq);
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/* W/A - seems to solve weird behavior. We need to remove this if we
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* don't want to stay in L1 all the time. This wastes a lot of power */
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@ -338,7 +338,6 @@ enum iwl_trans_state {
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* @hw_id: a u32 with the ID of the device / subdevice.
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* Set during transport allocation.
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* @hw_id_str: a string with info about HW ID. Set during transport allocation.
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* @ucode_write_complete: indicates that the ucode has been copied.
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* @nvm_device_type: indicates OTP or eeprom
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* @pm_support: set to true in start_hw if link pm is supported
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*/
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@ -355,8 +354,6 @@ struct iwl_trans {
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u32 hw_id;
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char hw_id_str[52];
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u8 ucode_write_complete;
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int nvm_device_type;
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bool pm_support;
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