drm/i915: Implement Wa4x4STCOptimizationDisable:chv
Wa4x4STCOptimizationDisable got only implemented for BDW, but according to the w/a database CHV needs it too, so add it. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Arun Siluvery <arun.siluvery@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -851,6 +851,10 @@ static int chv_init_workarounds(struct intel_engine_cs *ring)
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*/
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WA_CLR_BIT_MASKED(CACHE_MODE_0_GEN7, HIZ_RAW_STALL_OPT_DISABLE);
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/* Wa4x4STCOptimizationDisable:chv */
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WA_SET_BIT_MASKED(CACHE_MODE_1,
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GEN8_4x4_STC_OPTIMIZATION_DISABLE);
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/* Improve HiZ throughput on CHV. */
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WA_SET_BIT_MASKED(HIZ_CHICKEN, CHV_HZ_8X8_MODE_IN_1X);
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