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pinctrl: ocelot: Fix GPIO interrupt decoding on Jaguar2 

[ Upstream commit 0b47afc654 ]

This fixes a problem with using the GPIO as an interrupt on Jaguar2
(and similar), as the register layout of the platforms with 64 GPIO's
are pairwise, such that the original offset must be multiplied with
the platform stride.

Fixes: da801ab56a pinctrl: ocelot: add MSCC Jaguar2 support.
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Link: https://lore.kernel.org/r/20200513125532.24585-4-lars.povlsen@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
5.4-rM2-2.2.x-imx-squashed
Lars Povlsen 2020-05-13 14:55:21 +02:00 committed by Greg Kroah-Hartman
parent 4e55b843fa
commit 14c5e25d3b
1 changed files with 2 additions and 1 deletions
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3
drivers/pinctrl/pinctrl-ocelot.c
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@ -711,11 +711,12 @@ static void ocelot_irq_handler(struct irq_desc *desc)
struct irq_chip *parent_chip = irq_desc_get_chip(desc);
struct gpio_chip *chip = irq_desc_get_handler_data(desc);
struct ocelot_pinctrl *info = gpiochip_get_data(chip);
unsigned int id_reg = OCELOT_GPIO_INTR_IDENT * info->stride;
unsigned int reg = 0, irq, i;
unsigned long irqs;
for (i = 0; i < info->stride; i++) {
regmap_read(info->map, OCELOT_GPIO_INTR_IDENT + 4 * i, &reg);
regmap_read(info->map, id_reg + 4 * i, &reg);
if (!reg)
continue;