powerpc/85xx: Add SWIOTLB support to FSL boards
Add the platform-specific code for enabling SWIOTLB if needed on P2020DS, MPC85xx DS, and MPC85xx MDS boards as they are capable of having >4G of memory. We determine if we need to enable swiotlb based on how much memory is in the board and if it exceeds 4G or what we can map via PCI inbound windows. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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5cef379b34
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152d018282
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@ -35,12 +35,14 @@ config MPC85xx_MDS
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select DEFAULT_UIMAGE
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select PHYLIB
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select HAS_RAPIDIO
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select SWIOTLB
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help
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This option enables support for the MPC85xx MDS board
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config MPC8536_DS
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bool "Freescale MPC8536 DS"
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select DEFAULT_UIMAGE
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select SWIOTLB
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help
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This option enables support for the MPC8536 DS board
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@ -49,6 +51,7 @@ config MPC85xx_DS
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select PPC_I8259
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select DEFAULT_UIMAGE
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select FSL_ULI1575
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select SWIOTLB
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help
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This option enables support for the MPC85xx DS (MPC8544 DS) board
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@ -17,6 +17,7 @@
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#include <linux/seq_file.h>
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#include <linux/interrupt.h>
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#include <linux/of_platform.h>
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#include <linux/lmb.h>
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#include <asm/system.h>
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#include <asm/time.h>
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@ -26,6 +27,7 @@
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#include <asm/prom.h>
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#include <asm/udbg.h>
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#include <asm/mpic.h>
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#include <asm/swiotlb.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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@ -65,7 +67,9 @@ static void __init mpc8536_ds_setup_arch(void)
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{
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#ifdef CONFIG_PCI
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struct device_node *np;
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struct pci_controller *hose;
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#endif
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dma_addr_t max = 0xffffffff;
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if (ppc_md.progress)
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ppc_md.progress("mpc8536_ds_setup_arch()", 0);
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@ -80,11 +84,22 @@ static void __init mpc8536_ds_setup_arch(void)
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fsl_add_bridge(np, 1);
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else
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fsl_add_bridge(np, 0);
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hose = pci_find_hose_for_OF_device(np);
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max = min(max, hose->dma_window_base_cur +
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hose->dma_window_size);
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}
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}
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#endif
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#ifdef CONFIG_SWIOTLB
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if (lmb_end_of_DRAM() > max) {
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ppc_swiotlb_enable = 1;
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set_pci_dma_ops(&swiotlb_pci_dma_ops);
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}
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#endif
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printk("MPC8536 DS board from Freescale Semiconductor\n");
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}
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@ -102,6 +117,8 @@ static int __init mpc8536_ds_publish_devices(void)
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}
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machine_device_initcall(mpc8536_ds, mpc8536_ds_publish_devices);
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machine_arch_initcall(mpc8536_ds, swiotlb_setup_bus_notifier);
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/*
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* Called very early, device-tree isn't unflattened
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*/
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@ -20,6 +20,7 @@
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#include <linux/seq_file.h>
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#include <linux/interrupt.h>
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#include <linux/of_platform.h>
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#include <linux/lmb.h>
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#include <asm/system.h>
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#include <asm/time.h>
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@ -30,6 +31,7 @@
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#include <asm/udbg.h>
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#include <asm/mpic.h>
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#include <asm/i8259.h>
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#include <asm/swiotlb.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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@ -155,7 +157,9 @@ static void __init mpc85xx_ds_setup_arch(void)
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{
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#ifdef CONFIG_PCI
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struct device_node *np;
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struct pci_controller *hose;
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#endif
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dma_addr_t max = 0xffffffff;
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if (ppc_md.progress)
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ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
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@ -171,6 +175,10 @@ static void __init mpc85xx_ds_setup_arch(void)
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fsl_add_bridge(np, 1);
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else
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fsl_add_bridge(np, 0);
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hose = pci_find_hose_for_OF_device(np);
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max = min(max, hose->dma_window_base_cur +
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hose->dma_window_size);
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}
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}
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@ -181,6 +189,13 @@ static void __init mpc85xx_ds_setup_arch(void)
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mpc85xx_smp_init();
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#endif
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#ifdef CONFIG_SWIOTLB
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if (lmb_end_of_DRAM() > max) {
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ppc_swiotlb_enable = 1;
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set_pci_dma_ops(&swiotlb_pci_dma_ops);
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}
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#endif
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printk("MPC85xx DS board from Freescale Semiconductor\n");
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}
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@ -217,6 +232,10 @@ machine_device_initcall(mpc8544_ds, mpc85xxds_publish_devices);
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machine_device_initcall(mpc8572_ds, mpc85xxds_publish_devices);
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machine_device_initcall(p2020_ds, mpc85xxds_publish_devices);
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machine_arch_initcall(mpc8544_ds, swiotlb_setup_bus_notifier);
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machine_arch_initcall(mpc8572_ds, swiotlb_setup_bus_notifier);
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machine_arch_initcall(p2020_ds, swiotlb_setup_bus_notifier);
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/*
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* Called very early, device-tree isn't unflattened
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*/
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@ -33,6 +33,7 @@
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#include <linux/of_platform.h>
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#include <linux/of_device.h>
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#include <linux/phy.h>
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#include <linux/lmb.h>
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#include <asm/system.h>
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#include <asm/atomic.h>
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@ -49,6 +50,7 @@
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#include <asm/qe.h>
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#include <asm/qe_ic.h>
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#include <asm/mpic.h>
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#include <asm/swiotlb.h>
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#undef DEBUG
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#ifdef DEBUG
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@ -155,6 +157,10 @@ static void __init mpc85xx_mds_setup_arch(void)
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{
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struct device_node *np;
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static u8 __iomem *bcsr_regs = NULL;
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#ifdef CONFIG_PCI
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struct pci_controller *hose;
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#endif
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dma_addr_t max = 0xffffffff;
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if (ppc_md.progress)
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ppc_md.progress("mpc85xx_mds_setup_arch()", 0);
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@ -179,6 +185,10 @@ static void __init mpc85xx_mds_setup_arch(void)
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fsl_add_bridge(np, 1);
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else
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fsl_add_bridge(np, 0);
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hose = pci_find_hose_for_OF_device(np);
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max = min(max, hose->dma_window_base_cur +
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hose->dma_window_size);
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}
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}
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#endif
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@ -227,6 +237,13 @@ static void __init mpc85xx_mds_setup_arch(void)
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iounmap(bcsr_regs);
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}
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#endif /* CONFIG_QUICC_ENGINE */
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#ifdef CONFIG_SWIOTLB
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if (lmb_end_of_DRAM() > max) {
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ppc_swiotlb_enable = 1;
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set_pci_dma_ops(&swiotlb_pci_dma_ops);
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}
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#endif
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}
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@ -281,6 +298,9 @@ static int __init mpc85xx_publish_devices(void)
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machine_device_initcall(mpc8568_mds, mpc85xx_publish_devices);
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machine_device_initcall(mpc8569_mds, mpc85xx_publish_devices);
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machine_arch_initcall(mpc8568_mds, swiotlb_setup_bus_notifier);
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machine_arch_initcall(mpc8569_mds, swiotlb_setup_bus_notifier);
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static void __init mpc85xx_mds_pic_init(void)
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{
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struct mpic *mpic;
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