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dt-bindings: display: imx: ldb: Add i.MXqxp LDB compatible string and properties

This patch adds device tree binding support for i.MXqxp LDB,
including compatible string and additional properties.

Signed-off-by: Liu Ying <victor.liu@nxp.com>
5.4-rM2-2.2.x-imx-squashed
Liu Ying 2019-02-19 14:22:17 +08:00 committed by Dong Aisheng
parent 2e9d9adb1c
commit 15409f90e6
1 changed files with 16 additions and 9 deletions

View File

@ -10,13 +10,15 @@ Required properties:
- #address-cells : should be <1>
- #size-cells : should be <0>
- compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb" or
"fsl,imx8qm-ldb".
"fsl,imx8qm-ldb" or "fsl,imx8qxp-ldb".
All LDB versions are similar.
i.MX6q/dl has an additional multiplexer in the front to select
any of the two or four IPU display interfaces as input for each
LVDS channel.
i.MX8qm LDB supports 10bit RGB input and needs an additional
phy.
i.MX8qxp LDB only supports one LVDS encoder channel(either
channel0 or channel1).
- gpr : should be <&gpr> on i.MX53 and i.MX6q.
The phandle points to the iomuxc-gpr region containing the LVDS
control register.
@ -40,16 +42,20 @@ Required properties:
The needed clock numbers for each are documented in
Documentation/devicetree/bindings/clock/imx5-clock.txt, and in
Documentation/devicetree/bindings/clock/imx6q-clock.txt, and in
Documentation/devicetree/bindings/clock/imx8qm-lpcg.txt.
- power-domains : phandle pointing to power domain, only required by i.MX8qm.
Documentation/devicetree/bindings/clock/imx8qm-lpcg.txt, and in
Documentation/devicetree/bindings/clock/imx8qxp-lpcg.txt.
- power-domains : phandle pointing to power domain, only required by i.MX8qm and
i.MX8qxp.
Optional properties:
- pinctrl-names : should be "default" on i.MX53, not used on i.MX6q and i.MX8qm
- pinctrl-names : should be "default" on i.MX53, not used on i.MX6q, i.MX8qm
and i.MX8qxp
- pinctrl-0 : a phandle pointing to LVDS pin settings on i.MX53,
not used on i.MX6q and i.MX8qm
not used on i.MX6q, i.MX8qm and i.MX8qxp
- fsl,dual-channel : boolean. if it exists, only LVDS channel 0 should
be configured - one input will be distributed on both outputs in dual
channel mode
Currently, i.MX8qxp doesn't support dual channel mode.
LVDS Channel
============
@ -68,12 +74,13 @@ Required properties:
On i.MX6, there should be four input ports (port@[0-3]) that correspond
to the four LVDS multiplexer inputs.
On i.MX8qm, the two channels of LDB connect to one display interface of DPU.
A single output port (port@2 on i.MX5, port@4 on i.MX6, port@1 on i.MX8qm)
must be connected to a panel input port or a bridge input port.
A single output port (port@2 on i.MX5, port@4 on i.MX6, port@1 on i.MX8qm
and i.MX8qxp) must be connected to a panel input port or a bridge input port.
Optionally, the output port can be left out if display-timings are used
instead.
- phys: the phandle for the LVDS PHY device. Valid only on i.MX8qm.
- phy-names: should be "ldb_phy". Valid only on i.MX8qm.
- phys: the phandle for the LVDS PHY device. Valid only on i.MX8qm and
i.MX8qxp.
- phy-names: should be "ldb_phy". Valid only on i.MX8qm and i.MX8qxp.
Optional properties (required if display-timings are used):
- ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing