redonkable
/
alistair23-linux
1
0
Fork 0
Code Releases Activity

Revert "parisc: Revert "Release spinlocks using ordered store"" 

This reverts commit 86d4d068df.

Signed-off-by: Helge Deller <deller@gmx.de>
Cc: <stable@vger.kernel.org> # v5.0+
zero-sugar-mainline-defconfig
Helge Deller 2020-07-28 18:56:14 +02:00
parent 6e9f06ee6c
commit 157e9afcc4
2 changed files with 6 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/parisc/include/asm/spinlock.h
View File

@ -37,8 +37,8 @@ static inline void arch_spin_unlock(arch_spinlock_t *x)
volatile unsigned int *a; volatile unsigned int *a;
a = __ldcw_align(x); a = __ldcw_align(x);
mb(); /* Release with ordered store. */
*a = 1; __asm__ __volatile__("stw,ma %0,0(%1)" : : "r"(1), "r"(a) : "memory");
} }
static inline int arch_spin_trylock(arch_spinlock_t *x) static inline int arch_spin_trylock(arch_spinlock_t *x)

12
arch/parisc/kernel/syscall.S
View File

@ -640,8 +640,7 @@ cas_action:
sub,<> %r28, %r25, %r0 sub,<> %r28, %r25, %r0
2: stw %r24, 0(%r26) 2: stw %r24, 0(%r26)
/* Free lock */ /* Free lock */
sync stw,ma %r20, 0(%sr2,%r20)
stw %r20, 0(%sr2,%r20)
#if ENABLE_LWS_DEBUG #if ENABLE_LWS_DEBUG
/* Clear thread register indicator */ /* Clear thread register indicator */
stw %r0, 4(%sr2,%r20) stw %r0, 4(%sr2,%r20)
@ -655,8 +654,7 @@ cas_action:
3: 3:
/* Error occurred on load or store */ /* Error occurred on load or store */
/* Free lock */ /* Free lock */
sync stw,ma %r20, 0(%sr2,%r20)
stw %r20, 0(%sr2,%r20)
#if ENABLE_LWS_DEBUG #if ENABLE_LWS_DEBUG
stw %r0, 4(%sr2,%r20) stw %r0, 4(%sr2,%r20)
#endif #endif
@ -857,8 +855,7 @@ cas2_action:
cas2_end: cas2_end:
/* Free lock */ /* Free lock */
sync stw,ma %r20, 0(%sr2,%r20)
stw %r20, 0(%sr2,%r20)
/* Enable interrupts */ /* Enable interrupts */
ssm PSW_SM_I, %r0 ssm PSW_SM_I, %r0
/* Return to userspace, set no error */ /* Return to userspace, set no error */
@ -868,8 +865,7 @@ cas2_end:
22: 22:
/* Error occurred on load or store */ /* Error occurred on load or store */
/* Free lock */ /* Free lock */
sync stw,ma %r20, 0(%sr2,%r20)
stw %r20, 0(%sr2,%r20)
ssm PSW_SM_I, %r0 ssm PSW_SM_I, %r0
ldo 1(%r0),%r28 ldo 1(%r0),%r28
b lws_exit b lws_exit