drm/i915: enable parity error interrupts
The previous patch put all the code, and handlers in place. It should now be safe to enable the parity error interrupt. The parity error must be unmasked in both the GTIMR, and the CS IMR. Unfortunately, the docs aren't clear about this; nevertheless it's the truth. Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -1889,13 +1889,13 @@ static int ivybridge_irq_postinstall(struct drm_device *dev)
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DE_PIPEA_VBLANK_IVB);
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POSTING_READ(DEIER);
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dev_priv->gt_irq_mask = ~0;
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dev_priv->gt_irq_mask = ~GT_GEN7_L3_PARITY_ERROR_INTERRUPT;
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I915_WRITE(GTIIR, I915_READ(GTIIR));
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I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
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render_irqs = GT_USER_INTERRUPT | GEN6_BSD_USER_INTERRUPT |
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GEN6_BLITTER_USER_INTERRUPT;
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GEN6_BLITTER_USER_INTERRUPT | GT_GEN7_L3_PARITY_ERROR_INTERRUPT;
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I915_WRITE(GTIER, render_irqs);
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POSTING_READ(GTIER);
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@ -427,6 +427,9 @@ static int init_render_ring(struct intel_ring_buffer *ring)
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if (INTEL_INFO(dev)->gen >= 6)
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I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_FORCE_ORDERING));
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if (IS_IVYBRIDGE(dev))
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I915_WRITE_IMR(ring, ~GEN6_RENDER_L3_PARITY_ERROR);
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return ret;
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}
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@ -814,7 +817,11 @@ gen6_ring_get_irq(struct intel_ring_buffer *ring)
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spin_lock_irqsave(&dev_priv->irq_lock, flags);
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if (ring->irq_refcount++ == 0) {
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I915_WRITE_IMR(ring, ~ring->irq_enable_mask);
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if (IS_IVYBRIDGE(dev) && ring->id == RCS)
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I915_WRITE_IMR(ring, ~(ring->irq_enable_mask |
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GEN6_RENDER_L3_PARITY_ERROR));
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else
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I915_WRITE_IMR(ring, ~ring->irq_enable_mask);
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dev_priv->gt_irq_mask &= ~ring->irq_enable_mask;
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I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
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POSTING_READ(GTIMR);
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@ -833,7 +840,10 @@ gen6_ring_put_irq(struct intel_ring_buffer *ring)
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spin_lock_irqsave(&dev_priv->irq_lock, flags);
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if (--ring->irq_refcount == 0) {
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I915_WRITE_IMR(ring, ~0);
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if (IS_IVYBRIDGE(dev) && ring->id == RCS)
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I915_WRITE_IMR(ring, ~GEN6_RENDER_L3_PARITY_ERROR);
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else
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I915_WRITE_IMR(ring, ~0);
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dev_priv->gt_irq_mask |= ring->irq_enable_mask;
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I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
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POSTING_READ(GTIMR);
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