Merge branch 'renesas-dt' into renesas-soc-core
* renesas-dt: ARM: mach-shmobile: sh7372 generic board support via DT V2 ARM: mach-shmobile: Rework sh7372 INTCS demuxer V2 ARM: mach-shmobile: Use INTC_IRQ_PINS_16H on sh7372 ARM: mach-shmobile: Use 0x3400 as INTCS vector offset ARM: mach-shmobile: Introduce INTC_IRQ_PINS_16H ARM: mach-shmobile: Introduce shmobile_setup_delay()
This commit is contained in:
Rafael J. Wysocki
commit
15d2c83948
21
arch/arm/boot/dts/sh7372.dtsi
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21
arch/arm/boot/dts/sh7372.dtsi
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@ -0,0 +1,21 @@
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/*
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* Device Tree Source for the sh7372 SoC
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*
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* Copyright (C) 2012 Renesas Solutions Corp.
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/include/ "skeleton.dtsi"
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/ {
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compatible = "renesas,sh7372";
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cpus {
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cpu@0 {
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compatible = "arm,cortex-a8";
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};
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};
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};
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@ -3,6 +3,8 @@
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extern void shmobile_earlytimer_init(void);
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extern struct sys_timer shmobile_timer;
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extern void shmobile_setup_delay(unsigned int max_cpu_core_mhz,
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unsigned int mult, unsigned int div);
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struct twd_local_timer;
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extern void shmobile_setup_console(void);
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extern void shmobile_secondary_vector(void);
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@ -142,6 +142,50 @@ static struct intc_desc p ## _desc __initdata = { \
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p ## _sense_registers, p ## _ack_registers) \
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}
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#define INTC_IRQ_PINS_16H(p, base, vect, str) \
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\
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static struct resource p ## _resources[] __initdata = { \
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[0] = { \
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.start = base, \
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.end = base + 0x64, \
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.flags = IORESOURCE_MEM, \
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}, \
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}; \
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\
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enum { \
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p ## _UNUSED = 0, \
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INTC_IRQ_PINS_ENUM_16H(p), \
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}; \
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\
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static struct intc_vect p ## _vectors[] __initdata = { \
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INTC_IRQ_PINS_VECT_16H(p, vect), \
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}; \
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\
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static struct intc_mask_reg p ## _mask_registers[] __initdata = { \
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INTC_IRQ_PINS_MASK_16H(p, base), \
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}; \
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\
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static struct intc_prio_reg p ## _prio_registers[] __initdata = { \
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INTC_IRQ_PINS_PRIO_16H(p, base), \
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}; \
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\
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static struct intc_sense_reg p ## _sense_registers[] __initdata = { \
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INTC_IRQ_PINS_SENSE_16H(p, base), \
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}; \
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\
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static struct intc_mask_reg p ## _ack_registers[] __initdata = { \
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INTC_IRQ_PINS_ACK_16H(p, base), \
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}; \
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\
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static struct intc_desc p ## _desc __initdata = { \
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.name = str, \
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.resource = p ## _resources, \
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.num_resources = ARRAY_SIZE(p ## _resources), \
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.hw = INTC_HW_DESC(p ## _vectors, NULL, \
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p ## _mask_registers, p ## _prio_registers, \
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p ## _sense_registers, p ## _ack_registers) \
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}
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#define INTC_IRQ_PINS_32(p, base, vect, str) \
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\
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static struct resource p ## _resources[] __initdata = { \
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@ -7,7 +7,7 @@
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#define gic_spi(nr) ((nr) + 32)
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/* INTCS */
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#define INTCS_VECT_BASE 0x2200
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#define INTCS_VECT_BASE 0x3400
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#define INTCS_VECT(n, vect) INTC_VECT((n), INTCS_VECT_BASE + (vect))
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#define intcs_evt2irq(evt) evt2irq(INTCS_VECT_BASE + (evt))
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@ -19,6 +19,7 @@
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <linux/sh_intc.h>
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@ -305,14 +306,16 @@ static DECLARE_INTC_DESC(intca_desc, "sh7372-intca",
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intca_mask_registers, intca_prio_registers,
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NULL);
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INTC_IRQ_PINS_32(intca_irq_pins, 0xe6900000,
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INTC_VECT, "sh7372-intca-irq-pins");
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INTC_IRQ_PINS_16(intca_irq_pins_lo, 0xe6900000,
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INTC_VECT, "sh7372-intca-irq-lo");
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INTC_IRQ_PINS_16H(intca_irq_pins_hi, 0xe6900000,
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INTC_VECT, "sh7372-intca-irq-hi");
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enum {
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UNUSED_INTCS = 0,
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ENABLED_INTCS,
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INTCS,
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/* interrupt sources INTCS */
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/* IRQ0S - IRQ31S */
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@ -426,8 +429,6 @@ static struct intc_vect intcs_vectors[] = {
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INTCS_VECT(CPORTS2R, 0x1a20),
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/* CEC */
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INTCS_VECT(JPU6E, 0x1a80),
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INTC_VECT(INTCS, 0xf80),
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};
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static struct intc_group intcs_groups[] __initdata = {
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@ -490,9 +491,6 @@ static struct intc_mask_reg intcs_mask_registers[] = {
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{ 0xffd5019c, 0xffd501dc, 8, /* IMR7SA3 / IMCR7SA3 */
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{ MFIS2_INTCS, CPORTS2R, 0, 0,
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JPU6E, 0, 0, 0 } },
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{ 0xffd20104, 0, 16, /* INTAMASK */
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{ 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, INTCS } },
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};
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/* Priority is needed for INTCA to receive the INTCS interrupt */
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@ -557,18 +555,30 @@ static void __iomem *intcs_ffd5;
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void __init sh7372_init_irq(void)
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{
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void __iomem *intevtsa;
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int n;
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intcs_ffd2 = ioremap_nocache(0xffd20000, PAGE_SIZE);
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intevtsa = intcs_ffd2 + 0x100;
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intcs_ffd5 = ioremap_nocache(0xffd50000, PAGE_SIZE);
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register_intc_controller(&intca_desc);
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register_intc_controller(&intca_irq_pins_desc);
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register_intc_controller(&intca_irq_pins_lo_desc);
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register_intc_controller(&intca_irq_pins_hi_desc);
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register_intc_controller(&intcs_desc);
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/* setup dummy cascade chip for INTCS */
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n = evt2irq(0xf80);
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irq_alloc_desc_at(n, numa_node_id());
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irq_set_chip_and_handler_name(n, &dummy_irq_chip,
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handle_level_irq, "level");
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set_irq_flags(n, IRQF_VALID); /* yuck */
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/* demux using INTEVTSA */
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irq_set_handler_data(evt2irq(0xf80), (void *)intevtsa);
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irq_set_chained_handler(evt2irq(0xf80), intcs_demux);
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irq_set_handler_data(n, (void *)intevtsa);
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irq_set_chained_handler(n, intcs_demux);
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/* unmask INTCS in INTAMASK */
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iowrite16(0, intcs_ffd2 + 0x104);
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}
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static unsigned short ffd2[0x200];
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@ -22,6 +22,7 @@
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/platform_device.h>
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#include <linux/of_platform.h>
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#include <linux/uio_driver.h>
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#include <linux/delay.h>
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#include <linux/input.h>
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@ -1092,3 +1093,50 @@ void __init sh7372_add_early_devices(void)
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/* override timer setup with soc-specific code */
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shmobile_timer.init = sh7372_earlytimer_init;
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}
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#ifdef CONFIG_USE_OF
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void __init sh7372_add_early_devices_dt(void)
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{
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shmobile_setup_delay(800, 1, 3); /* Cortex-A8 @ 800MHz */
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early_platform_add_devices(sh7372_early_devices,
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ARRAY_SIZE(sh7372_early_devices));
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/* setup early console here as well */
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shmobile_setup_console();
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}
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static const struct of_dev_auxdata sh7372_auxdata_lookup[] __initconst = {
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{ }
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};
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void __init sh7372_add_standard_devices_dt(void)
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{
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/* clocks are setup late during boot in the case of DT */
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sh7372_clock_init();
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platform_add_devices(sh7372_early_devices,
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ARRAY_SIZE(sh7372_early_devices));
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of_platform_populate(NULL, of_default_bus_match_table,
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sh7372_auxdata_lookup, NULL);
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}
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static const char *sh7372_boards_compat_dt[] __initdata = {
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"renesas,sh7372",
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NULL,
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};
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DT_MACHINE_START(SH7372_DT, "Generic SH7372 (Flattened Device Tree)")
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.map_io = sh7372_map_io,
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.init_early = sh7372_add_early_devices_dt,
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.nr_irqs = NR_IRQS_LEGACY,
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.init_irq = sh7372_init_irq,
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.handle_irq = shmobile_handle_irq_intc,
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.init_machine = sh7372_add_standard_devices_dt,
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.timer = &shmobile_timer,
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.dt_compat = sh7372_boards_compat_dt,
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MACHINE_END
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#endif /* CONFIG_USE_OF */
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@ -19,9 +19,26 @@
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*
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*/
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <asm/mach/time.h>
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#include <asm/smp_twd.h>
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void __init shmobile_setup_delay(unsigned int max_cpu_core_mhz,
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unsigned int mult, unsigned int div)
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{
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/* calculate a worst-case loops-per-jiffy value
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* based on maximum cpu core mhz setting and the
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* __delay() implementation in arch/arm/lib/delay.S
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*
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* this will result in a longer delay than expected
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* when the cpu core runs on lower frequencies.
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*/
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unsigned int value = (1000000 * mult) / (HZ * div);
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lpj_fine = max_cpu_core_mhz * value;
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}
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static void __init shmobile_late_time_init(void)
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{
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/*
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