[PATCH] x86: Refactor thermal throttle processing
Refactor the event processing (syslog messaging and rate limiting) into separate file therm_throt.c. This allows consistent reporting of CPU thermal throttle events. After ACK'ing the interrupt, if the event is current, the user (p4.c/mce_intel.c) calls therm_throt_process to log (and rate limit) the event. If that function returns 1, the user has the option to log things further (such as to mce_log in x86_64). AK: minor cleanup Signed-off-by: Dmitriy Zavin <dmitriyz@google.com> Signed-off-by: Andi Kleen <ak@suse.de>hifive-unleashed-5.1
Dmitriy Zavin
Andi Kleen
parent
3b17167283
commit
15d5f83983
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@ -1,2 +1,2 @@
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obj-y = mce.o k7.o p4.o p5.o p6.o winchip.o
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obj-y = mce.o k7.o p4.o p5.o p6.o winchip.o therm_throt.o
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obj-$(CONFIG_X86_MCE_NONFATAL) += non-fatal.o
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@ -13,6 +13,8 @@
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#include <asm/msr.h>
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#include <asm/apic.h>
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#include <asm/therm_throt.h>
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#include "mce.h"
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/* as supported by the P4/Xeon family */
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@ -44,25 +46,12 @@ static void unexpected_thermal_interrupt(struct pt_regs *regs)
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/* P4/Xeon Thermal transition interrupt handler */
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static void intel_thermal_interrupt(struct pt_regs *regs)
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{
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u32 l, h;
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unsigned int cpu = smp_processor_id();
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static unsigned long next[NR_CPUS];
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__u64 msr_val;
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ack_APIC_irq();
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if (time_after(next[cpu], jiffies))
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return;
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next[cpu] = jiffies + HZ*5;
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rdmsr(MSR_IA32_THERM_STATUS, l, h);
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if (l & 0x1) {
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printk(KERN_EMERG "CPU%d: Temperature above threshold\n", cpu);
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printk(KERN_EMERG "CPU%d: Running in modulated clock mode\n",
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cpu);
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add_taint(TAINT_MACHINE_CHECK);
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} else {
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printk(KERN_INFO "CPU%d: Temperature/speed normal\n", cpu);
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}
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rdmsrl(MSR_IA32_THERM_STATUS, msr_val);
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therm_throt_process(msr_val & 0x1);
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}
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/* Thermal interrupt handler for this CPU setup */
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@ -122,7 +111,7 @@ static void intel_init_thermal(struct cpuinfo_x86 *c)
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rdmsr (MSR_IA32_MISC_ENABLE, l, h);
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wrmsr (MSR_IA32_MISC_ENABLE, l | (1<<3), h);
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l = apic_read (APIC_LVTTHMR);
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apic_write_around (APIC_LVTTHMR, l & ~APIC_LVT_MASKED);
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printk (KERN_INFO "CPU%d: Thermal monitoring enabled\n", cpu);
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@ -0,0 +1,58 @@
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/*
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* linux/arch/i386/kerne/cpu/mcheck/therm_throt.c
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*
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* Thermal throttle event support code.
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*
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* Author: Dmitriy Zavin (dmitriyz@google.com)
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*
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* Credits: Adapted from Zwane Mwaikambo's original code in mce_intel.c.
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*
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*/
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#include <linux/percpu.h>
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#include <linux/cpu.h>
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#include <asm/cpu.h>
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#include <linux/notifier.h>
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#include <asm/therm_throt.h>
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/* How long to wait between reporting thermal events */
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#define CHECK_INTERVAL (300 * HZ)
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static DEFINE_PER_CPU(unsigned long, next_check);
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/***
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* therm_throt_process - Process thermal throttling event
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* @curr: Whether the condition is current or not (boolean), since the
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* thermal interrupt normally gets called both when the thermal
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* event begins and once the event has ended.
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*
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* This function is normally called by the thermal interrupt after the
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* IRQ has been acknowledged.
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*
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* It will take care of rate limiting and printing messages to the syslog.
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*
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* Returns: 0 : Event should NOT be further logged, i.e. still in
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* "timeout" from previous log message.
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* 1 : Event should be logged further, and a message has been
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* printed to the syslog.
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*/
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int therm_throt_process(int curr)
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{
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unsigned int cpu = smp_processor_id();
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if (time_before(jiffies, __get_cpu_var(next_check)))
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return 0;
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__get_cpu_var(next_check) = jiffies + CHECK_INTERVAL;
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/* if we just entered the thermal event */
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if (curr) {
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printk(KERN_CRIT "CPU%d: Temperature above threshold, "
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"cpu clock throttled\n", cpu);
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add_taint(TAINT_MACHINE_CHECK);
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} else {
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printk(KERN_CRIT "CPU%d: Temperature/speed normal\n", cpu);
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}
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return 1;
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}
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@ -11,7 +11,7 @@ obj-y := process.o signal.o entry.o traps.o irq.o \
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pci-dma.o pci-nommu.o alternative.o
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obj-$(CONFIG_STACKTRACE) += stacktrace.o
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obj-$(CONFIG_X86_MCE) += mce.o
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obj-$(CONFIG_X86_MCE) += mce.o therm_throt.o
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obj-$(CONFIG_X86_MCE_INTEL) += mce_intel.o
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obj-$(CONFIG_X86_MCE_AMD) += mce_amd.o
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obj-$(CONFIG_MTRR) += ../../i386/kernel/cpu/mtrr/
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@ -46,6 +46,7 @@ obj-y += intel_cacheinfo.o
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CFLAGS_vsyscall.o := $(PROFILING) -g0
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therm_throt-y += ../../i386/kernel/cpu/mcheck/therm_throt.o
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bootflag-y += ../../i386/kernel/bootflag.o
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cpuid-$(subst m,y,$(CONFIG_X86_CPUID)) += ../../i386/kernel/cpuid.o
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topology-y += ../../i386/kernel/topology.o
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@ -55,4 +56,3 @@ quirks-y += ../../i386/kernel/quirks.o
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i8237-y += ../../i386/kernel/i8237.o
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msr-$(subst m,y,$(CONFIG_X86_MSR)) += ../../i386/kernel/msr.o
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alternative-y += ../../i386/kernel/alternative.o
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@ -274,6 +274,33 @@ void do_machine_check(struct pt_regs * regs, long error_code)
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atomic_dec(&mce_entry);
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}
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#ifdef CONFIG_X86_MCE_INTEL
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/***
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* mce_log_therm_throt_event - Logs the thermal throttling event to mcelog
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* @cpu: The CPU on which the event occured.
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* @status: Event status information
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*
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* This function should be called by the thermal interrupt after the
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* event has been processed and the decision was made to log the event
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* further.
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*
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* The status parameter will be saved to the 'status' field of 'struct mce'
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* and historically has been the register value of the
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* MSR_IA32_THERMAL_STATUS (Intel) msr.
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*/
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void mce_log_therm_throt_event(unsigned int cpu, __u64 status)
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{
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struct mce m;
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memset(&m, 0, sizeof(m));
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m.cpu = cpu;
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m.bank = MCE_THERMAL_BANK;
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m.status = status;
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rdtscll(m.tsc);
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mce_log(&m);
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}
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#endif /* CONFIG_X86_MCE_INTEL */
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/*
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* Periodic polling timer for "silent" machine check errors.
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*/
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@ -11,36 +11,21 @@
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#include <asm/mce.h>
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#include <asm/hw_irq.h>
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#include <asm/idle.h>
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static DEFINE_PER_CPU(unsigned long, next_check);
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#include <asm/therm_throt.h>
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asmlinkage void smp_thermal_interrupt(void)
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{
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struct mce m;
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__u64 msr_val;
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ack_APIC_irq();
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exit_idle();
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irq_enter();
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if (time_before(jiffies, __get_cpu_var(next_check)))
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goto done;
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__get_cpu_var(next_check) = jiffies + HZ*300;
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memset(&m, 0, sizeof(m));
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m.cpu = smp_processor_id();
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m.bank = MCE_THERMAL_BANK;
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rdtscll(m.tsc);
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rdmsrl(MSR_IA32_THERM_STATUS, m.status);
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if (m.status & 0x1) {
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printk(KERN_EMERG
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"CPU%d: Temperature above threshold, cpu clock throttled\n", m.cpu);
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add_taint(TAINT_MACHINE_CHECK);
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} else {
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printk(KERN_EMERG "CPU%d: Temperature/speed normal\n", m.cpu);
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}
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rdmsrl(MSR_IA32_THERM_STATUS, msr_val);
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if (therm_throt_process(msr_val & 1))
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mce_log_therm_throt_event(smp_processor_id(), msr_val);
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mce_log(&m);
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done:
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irq_exit();
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}
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@ -0,0 +1,6 @@
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#ifndef __ASM_I386_THERM_THROT_H__
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#define __ASM_I386_THERM_THROT_H__ 1
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int therm_throt_process(int curr);
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#endif /* __ASM_I386_THERM_THROT_H__ */
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@ -99,6 +99,8 @@ static inline void mce_amd_feature_init(struct cpuinfo_x86 *c)
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}
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#endif
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void mce_log_therm_throt_event(unsigned int cpu, __u64 status);
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extern atomic_t mce_entry;
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#endif
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@ -0,0 +1 @@
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#include <asm-i386/therm_throt.h>
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