staging: et131x: Refactor et131x_isr() to remove indenting
By negating a 'status' variable check in et131x_isr(), we can remove the indenting of a large block of code, increasing the readability. This patch does exactly that. Signed-off-by: Mark Einon <mark.einon@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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0b5e409224
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@ -4234,182 +4234,169 @@ static void et131x_isr_handler(struct work_struct *work)
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status &= 0xffffffd7;
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if (status) {
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/* Handle the TXDMA Error interrupt */
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if (status & ET_INTR_TXDMA_ERR) {
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u32 txdma_err;
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if (!status)
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goto out;
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/* Following read also clears the register (COR) */
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txdma_err = readl(&iomem->txdma.tx_dma_error);
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/* Handle the TXDMA Error interrupt */
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if (status & ET_INTR_TXDMA_ERR) {
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u32 txdma_err;
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dev_warn(&adapter->pdev->dev,
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"TXDMA_ERR interrupt, error = %d\n",
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txdma_err);
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}
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/* Following read also clears the register (COR) */
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txdma_err = readl(&iomem->txdma.tx_dma_error);
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/* Handle Free Buffer Ring 0 and 1 Low interrupt */
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if (status &
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(ET_INTR_RXDMA_FB_R0_LOW | ET_INTR_RXDMA_FB_R1_LOW)) {
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/*
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* This indicates the number of unused buffers in
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* RXDMA free buffer ring 0 is <= the limit you
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* programmed. Free buffer resources need to be
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* returned. Free buffers are consumed as packets
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* are passed from the network to the host. The host
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* becomes aware of the packets from the contents of
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* the packet status ring. This ring is queried when
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* the packet done interrupt occurs. Packets are then
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* passed to the OS. When the OS is done with the
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* packets the resources can be returned to the
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* ET1310 for re-use. This interrupt is one method of
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* returning resources.
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*/
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dev_warn(&adapter->pdev->dev,
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"TXDMA_ERR interrupt, error = %d\n",
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txdma_err);
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}
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/* If the user has flow control on, then we will
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* send a pause packet, otherwise just exit
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*/
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if (adapter->flowcontrol == FLOW_TXONLY ||
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adapter->flowcontrol == FLOW_BOTH) {
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u32 pm_csr;
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/* Handle Free Buffer Ring 0 and 1 Low interrupt */
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if (status & (ET_INTR_RXDMA_FB_R0_LOW | ET_INTR_RXDMA_FB_R1_LOW)) {
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/*
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* This indicates the number of unused buffers in RXDMA free
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* buffer ring 0 is <= the limit you programmed. Free buffer
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* resources need to be returned. Free buffers are consumed as
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* packets are passed from the network to the host. The host
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* becomes aware of the packets from the contents of the packet
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* status ring. This ring is queried when the packet done
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* interrupt occurs. Packets are then passed to the OS. When
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* the OS is done with the packets the resources can be
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* returned to the ET1310 for re-use. This interrupt is one
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* method of returning resources.
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*/
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/* Tell the device to send a pause packet via
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* the back pressure register (bp req and
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* bp xon/xoff)
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*/
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pm_csr = readl(&iomem->global.pm_csr);
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if (!et1310_in_phy_coma(adapter))
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writel(3, &iomem->txmac.bp_ctrl);
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}
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}
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/* Handle Packet Status Ring Low Interrupt */
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if (status & ET_INTR_RXDMA_STAT_LOW) {
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/*
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* If the user has flow control on, then we will
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* send a pause packet, otherwise just exit
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*/
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if (adapter->flowcontrol == FLOW_TXONLY ||
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adapter->flowcontrol == FLOW_BOTH) {
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u32 pm_csr;
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/*
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* Same idea as with the two Free Buffer Rings.
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* Packets going from the network to the host each
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* consume a free buffer resource and a packet status
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* resource. These resoures are passed to the OS.
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* When the OS is done with the resources, they need
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* to be returned to the ET1310. This is one method
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* of returning the resources.
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*/
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}
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/* Handle RXDMA Error Interrupt */
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if (status & ET_INTR_RXDMA_ERR) {
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/*
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* The rxdma_error interrupt is sent when a time-out
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* on a request issued by the JAGCore has occurred or
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* a completion is returned with an un-successful
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* status. In both cases the request is considered
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* complete. The JAGCore will automatically re-try the
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* request in question. Normally information on events
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* like these are sent to the host using the "Advanced
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* Error Reporting" capability. This interrupt is
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* another way of getting similar information. The
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* only thing required is to clear the interrupt by
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* reading the ISR in the global resources. The
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* JAGCore will do a re-try on the request. Normally
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* you should never see this interrupt. If you start
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* to see this interrupt occurring frequently then
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* something bad has occurred. A reset might be the
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* thing to do.
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*/
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/* TRAP();*/
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dev_warn(&adapter->pdev->dev,
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"RxDMA_ERR interrupt, error %x\n",
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readl(&iomem->txmac.tx_test));
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}
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/* Handle the Wake on LAN Event */
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if (status & ET_INTR_WOL) {
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/*
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* This is a secondary interrupt for wake on LAN.
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* The driver should never see this, if it does,
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* something serious is wrong. We will TRAP the
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* message when we are in DBG mode, otherwise we
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* will ignore it.
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*/
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dev_err(&adapter->pdev->dev, "WAKE_ON_LAN interrupt\n");
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}
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/* Let's move on to the TxMac */
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if (status & ET_INTR_TXMAC) {
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u32 err = readl(&iomem->txmac.err);
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/*
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* When any of the errors occur and TXMAC generates
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* an interrupt to report these errors, it usually
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* means that TXMAC has detected an error in the data
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* stream retrieved from the on-chip Tx Q. All of
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* these errors are catastrophic and TXMAC won't be
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* able to recover data when these errors occur. In
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* a nutshell, the whole Tx path will have to be reset
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* and re-configured afterwards.
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*/
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dev_warn(&adapter->pdev->dev,
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"TXMAC interrupt, error 0x%08x\n",
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err);
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/* If we are debugging, we want to see this error,
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* otherwise we just want the device to be reset and
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* continue
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*/
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}
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/* Handle RXMAC Interrupt */
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if (status & ET_INTR_RXMAC) {
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/*
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* These interrupts are catastrophic to the device,
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* what we need to do is disable the interrupts and
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* set the flag to cause us to reset so we can solve
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* this issue.
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*/
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/* MP_SET_FLAG( adapter,
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fMP_ADAPTER_HARDWARE_ERROR); */
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dev_warn(&adapter->pdev->dev,
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"RXMAC interrupt, error 0x%08x. Requesting reset\n",
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readl(&iomem->rxmac.err_reg));
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dev_warn(&adapter->pdev->dev,
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"Enable 0x%08x, Diag 0x%08x\n",
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readl(&iomem->rxmac.ctrl),
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readl(&iomem->rxmac.rxq_diag));
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/*
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* If we are debugging, we want to see this error,
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* otherwise we just want the device to be reset and
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* continue
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*/
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}
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/* Handle MAC_STAT Interrupt */
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if (status & ET_INTR_MAC_STAT) {
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/*
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* This means at least one of the un-masked counters
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* in the MAC_STAT block has rolled over. Use this
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* to maintain the top, software managed bits of the
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* counter(s).
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*/
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et1310_handle_macstat_interrupt(adapter);
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}
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/* Handle SLV Timeout Interrupt */
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if (status & ET_INTR_SLV_TIMEOUT) {
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/*
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* This means a timeout has occurred on a read or
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* write request to one of the JAGCore registers. The
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* Global Resources block has terminated the request
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* and on a read request, returned a "fake" value.
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* The most likely reasons are: Bad Address or the
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* addressed module is in a power-down state and
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* can't respond.
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* Tell the device to send a pause packet via the back
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* pressure register (bp req and bp xon/xoff)
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*/
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pm_csr = readl(&iomem->global.pm_csr);
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if (!et1310_in_phy_coma(adapter))
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writel(3, &iomem->txmac.bp_ctrl);
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}
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}
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/* Handle Packet Status Ring Low Interrupt */
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if (status & ET_INTR_RXDMA_STAT_LOW) {
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/*
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* Same idea as with the two Free Buffer Rings. Packets going
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* from the network to the host each consume a free buffer
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* resource and a packet status resource. These resoures are
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* passed to the OS. When the OS is done with the resources,
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* they need to be returned to the ET1310. This is one method
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* of returning the resources.
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*/
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}
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/* Handle RXDMA Error Interrupt */
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if (status & ET_INTR_RXDMA_ERR) {
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/*
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* The rxdma_error interrupt is sent when a time-out on a
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* request issued by the JAGCore has occurred or a completion is
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* returned with an un-successful status. In both cases the
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* request is considered complete. The JAGCore will
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* automatically re-try the request in question. Normally
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* information on events like these are sent to the host using
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* the "Advanced Error Reporting" capability. This interrupt is
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* another way of getting similar information. The only thing
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* required is to clear the interrupt by reading the ISR in the
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* global resources. The JAGCore will do a re-try on the
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* request. Normally you should never see this interrupt. If
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* you start to see this interrupt occurring frequently then
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* something bad has occurred. A reset might be the thing to do.
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*/
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/* TRAP();*/
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dev_warn(&adapter->pdev->dev,
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"RxDMA_ERR interrupt, error %x\n",
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readl(&iomem->txmac.tx_test));
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}
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/* Handle the Wake on LAN Event */
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if (status & ET_INTR_WOL) {
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/*
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* This is a secondary interrupt for wake on LAN. The driver
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* should never see this, if it does, something serious is
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* wrong. We will TRAP the message when we are in DBG mode,
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* otherwise we will ignore it.
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*/
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dev_err(&adapter->pdev->dev, "WAKE_ON_LAN interrupt\n");
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}
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/* Let's move on to the TxMac */
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if (status & ET_INTR_TXMAC) {
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u32 err = readl(&iomem->txmac.err);
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/*
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* When any of the errors occur and TXMAC generates an
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* interrupt to report these errors, it usually means that
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* TXMAC has detected an error in the data stream retrieved
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* from the on-chip Tx Q. All of these errors are catastrophic
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* and TXMAC won't be able to recover data when these errors
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* occur. In a nutshell, the whole Tx path will have to be reset
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* and re-configured afterwards.
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*/
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dev_warn(&adapter->pdev->dev,
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"TXMAC interrupt, error 0x%08x\n",
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err);
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/*
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* If we are debugging, we want to see this error, otherwise we
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* just want the device to be reset and continue
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*/
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}
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/* Handle RXMAC Interrupt */
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if (status & ET_INTR_RXMAC) {
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/*
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* These interrupts are catastrophic to the device, what we need
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* to do is disable the interrupts and set the flag to cause us
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* to reset so we can solve this issue.
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*/
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/* MP_SET_FLAG( adapter, fMP_ADAPTER_HARDWARE_ERROR); */
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dev_warn(&adapter->pdev->dev,
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"RXMAC interrupt, error 0x%08x. Requesting reset\n",
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readl(&iomem->rxmac.err_reg));
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dev_warn(&adapter->pdev->dev,
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"Enable 0x%08x, Diag 0x%08x\n",
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readl(&iomem->rxmac.ctrl),
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readl(&iomem->rxmac.rxq_diag));
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/*
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* If we are debugging, we want to see this error, otherwise we
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* just want the device to be reset and continue
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*/
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}
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/* Handle MAC_STAT Interrupt */
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if (status & ET_INTR_MAC_STAT) {
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/*
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* This means at least one of the un-masked counters in the
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* MAC_STAT block has rolled over. Use this to maintain the top,
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* software managed bits of the counter(s).
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*/
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et1310_handle_macstat_interrupt(adapter);
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}
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/* Handle SLV Timeout Interrupt */
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if (status & ET_INTR_SLV_TIMEOUT) {
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/*
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* This means a timeout has occurred on a read or write request
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* to one of the JAGCore registers. The Global Resources block
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* has terminated the request and on a read request, returned a
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* "fake" value. The most likely reasons are: Bad Address or the
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* addressed module is in a power-down state and can't respond.
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*/
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}
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out:
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et131x_enable_interrupts(adapter);
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}
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