MIPS: ath25: add SoC type detection
Detect SoC type based on device ID and board configuration data. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> Cc: Linux MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/8244/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -24,6 +24,8 @@
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#include <asm/reboot.h>
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#include <asm/time.h>
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#include <ath25_platform.h>
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#include "devices.h"
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#include "ar2315.h"
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#include "ar2315_regs.h"
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@ -249,6 +251,7 @@ void __init ar2315_plat_mem_setup(void)
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{
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void __iomem *sdram_base;
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u32 memsize, memcfg;
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u32 devid;
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u32 config;
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/* Detect memory size */
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@ -264,6 +267,25 @@ void __init ar2315_plat_mem_setup(void)
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ar2315_rst_base = ioremap_nocache(AR2315_RST_BASE, AR2315_RST_SIZE);
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/* Detect the hardware based on the device ID */
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devid = ar2315_rst_reg_read(AR2315_SREV) & AR2315_REV_CHIP;
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switch (devid) {
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case 0x91: /* Need to check */
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ath25_soc = ATH25_SOC_AR2318;
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break;
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case 0x90:
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ath25_soc = ATH25_SOC_AR2317;
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break;
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case 0x87:
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ath25_soc = ATH25_SOC_AR2316;
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break;
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case 0x86:
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default:
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ath25_soc = ATH25_SOC_AR2315;
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break;
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}
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ath25_board.devid = devid;
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/* Clear any lingering AHB errors */
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config = read_c0_config();
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write_c0_config(config & ~0x3);
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@ -24,6 +24,8 @@
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#include <asm/reboot.h>
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#include <asm/time.h>
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#include <ath25_platform.h>
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#include "devices.h"
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#include "ar5312.h"
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#include "ar5312_regs.h"
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@ -191,10 +193,25 @@ static void __init ar5312_flash_init(void)
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void __init ar5312_init_devices(void)
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{
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struct ath25_boarddata *config;
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ar5312_flash_init();
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/* Locate board/radio config data */
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ath25_find_config(AR5312_FLASH_BASE, AR5312_FLASH_SIZE);
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config = ath25_board.config;
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/* AR2313 has CPU minor rev. 10 */
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if ((current_cpu_data.processor_id & 0xff) == 0x0a)
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ath25_soc = ATH25_SOC_AR2313;
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/* AR2312 shares the same Silicon ID as AR5312 */
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else if (config->flags & BD_ISCASPER)
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ath25_soc = ATH25_SOC_AR2312;
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/* Everything else is probably AR5312 or compatible */
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else
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ath25_soc = ATH25_SOC_AR5312;
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}
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static void ar5312_restart(char *command)
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@ -282,6 +299,7 @@ void __init ar5312_plat_mem_setup(void)
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{
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void __iomem *sdram_base;
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u32 memsize, memcfg, bank0_ac, bank1_ac;
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u32 devid;
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/* Detect memory size */
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sdram_base = ioremap_nocache(AR5312_SDRAMCTL_BASE,
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@ -297,6 +315,11 @@ void __init ar5312_plat_mem_setup(void)
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ar5312_rst_base = ioremap_nocache(AR5312_RST_BASE, AR5312_RST_SIZE);
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devid = ar5312_rst_reg_read(AR5312_REV);
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devid >>= AR5312_REV_WMAC_MIN_S;
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devid &= AR5312_REV_CHIP;
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ath25_board.devid = (u16)devid;
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/* Clear any lingering AHB errors */
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ar5312_rst_reg_read(AR5312_PROCADDR);
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ar5312_rst_reg_read(AR5312_DMAADDR);
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@ -9,10 +9,25 @@
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#include "ar2315.h"
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struct ar231x_board_config ath25_board;
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enum ath25_soc_type ath25_soc = ATH25_SOC_UNKNOWN;
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static const char * const soc_type_strings[] = {
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[ATH25_SOC_AR5312] = "Atheros AR5312",
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[ATH25_SOC_AR2312] = "Atheros AR2312",
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[ATH25_SOC_AR2313] = "Atheros AR2313",
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[ATH25_SOC_AR2315] = "Atheros AR2315",
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[ATH25_SOC_AR2316] = "Atheros AR2316",
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[ATH25_SOC_AR2317] = "Atheros AR2317",
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[ATH25_SOC_AR2318] = "Atheros AR2318",
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[ATH25_SOC_UNKNOWN] = "Atheros (unknown)",
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};
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const char *get_system_type(void)
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{
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return "Atheros (unknown)";
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if ((ath25_soc >= ARRAY_SIZE(soc_type_strings)) ||
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!soc_type_strings[ath25_soc])
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return soc_type_strings[ATH25_SOC_UNKNOWN];
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return soc_type_strings[ath25_soc];
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}
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void __init ath25_serial_setup(u32 mapbase, int irq, unsigned int uartclk)
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@ -7,6 +7,22 @@
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#define ATH25_IRQ_CPU_CLOCK (MIPS_CPU_IRQ_BASE + 7) /* C0_CAUSE: 0x8000 */
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enum ath25_soc_type {
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/* handled by ar5312.c */
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ATH25_SOC_AR2312,
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ATH25_SOC_AR2313,
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ATH25_SOC_AR5312,
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/* handled by ar2315.c */
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ATH25_SOC_AR2315,
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ATH25_SOC_AR2316,
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ATH25_SOC_AR2317,
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ATH25_SOC_AR2318,
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ATH25_SOC_UNKNOWN
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};
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extern enum ath25_soc_type ath25_soc;
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extern struct ar231x_board_config ath25_board;
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extern void (*ath25_irq_dispatch)(void);
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