ath9k_hw: Enable hw PLL power save for AR9462
This reduced the power consumption to half in full and network sleep. Cc: stable@vger.kernel.org Cc: Paul Stewart <pstew@chromium.org> Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -219,10 +219,10 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
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/* Awake -> Sleep Setting */
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INIT_INI_ARRAY(&ah->iniPcieSerdes,
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ar9462_pciephy_pll_on_clkreq_disable_L1_2p0);
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ar9462_pciephy_clkreq_disable_L1_2p0);
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/* Sleep -> Awake Setting */
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INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
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ar9462_pciephy_pll_on_clkreq_disable_L1_2p0);
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ar9462_pciephy_clkreq_disable_L1_2p0);
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/* Fast clock modal settings */
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INIT_INI_ARRAY(&ah->iniModesFastClock,
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