- Add a module description to the Hyper-V vmbus module.
- Rework some vmbus code to separate architecture specifics out to arch/x86/. This is part of the work of adding arm64 support to Hyper-V. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE4n5dijQDou9mhzu83qZv95d3LNwFAl0nfBEACgkQ3qZv95d3 LNyf8Q//fn+Eb+Pun3a5Cus8qYBQIYrVpt/bUmMuisV8A+MdRIOSwUU/oEbzCEwa RhKKGKkNSkItKHz0QyqC9FwHZ18+6iLmSF1VwHzKVV+GJ1kQqI9+r4dC23yO/OCz cuB6Uc+Jd7eLV9021U0jgmYI2HOLOfd5IUNqnyxuw6BPYYaJhrf3J9qSnlKmJ2tW qhzSfKC2nn0+QbYSC5ww990o10vPMw3mcoXu23HKOU7Q2aqKkdK0HWjNrv49eent NPbtjFoSABSVS+4eTzW1BrK2Rkwa+TVpAC75a4OPOd4KPUvibqCWjmEl8IE55Pre BXwUoZnZN5cC1ayUGYuhyOmzFJtwxSWqgXlZRrmr+/XDgNk4k4V2bv253yFegZw2 1hMTbGwYrk4MrGNQB3YvnzJz8ObrTmNR98JvJz/bKPtHKmKmIbHcCWkR5gYAApuy cY9PqKR5wWQ5A+leePzpXIXDtWlDHy7SDhUU14mbEj2bvQ3tC0yodHabpzl0Lx8e feXGuqt/g5Lop+KGcRJj32tx23JBRkwfgIyagfRAdzVCs4urp9pt+tKezPkEpWW6 dd+Gc43Rnjd94neTCoo1seS9KH7n56ldnmeygMEDzI0rgW0q1m/Qwys0+6BIQR2G lmcL1qJlquy3Fjfs1aYkkPqkQYoIqDwGQivSUgIDZ0TLBIsWAfY= =wIj3 -----END PGP SIGNATURE----- Merge tag 'hyperv-next-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux Pull hyper-v updates from Sasha Levin: - Add a module description to the Hyper-V vmbus module. - Rework some vmbus code to separate architecture specifics out to arch/x86/. This is part of the work of adding arm64 support to Hyper-V. * tag 'hyperv-next-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux: Drivers: hv: vmbus: Break out ISA independent parts of mshyperv.h drivers: hv: Add a module description line to the hv_vmbus driveralistair/sunxi64-5.4-dsi
Linus Torvalds
commit
16c97650a5
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|
@ -7422,6 +7422,7 @@ F: net/vmw_vsock/hyperv_transport.c
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F: include/clocksource/hyperv_timer.h
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F: include/linux/hyperv.h
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F: include/uapi/linux/hyperv.h
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F: include/asm-generic/mshyperv.h
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F: tools/hv/
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F: Documentation/ABI/stable/sysfs-bus-vmbus
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@ -3,84 +3,15 @@
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#define _ASM_X86_MSHYPER_H
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#include <linux/types.h>
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#include <linux/atomic.h>
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#include <linux/nmi.h>
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#include <asm/io.h>
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#include <asm/hyperv-tlfs.h>
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#include <asm/nospec-branch.h>
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#define VP_INVAL U32_MAX
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struct ms_hyperv_info {
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u32 features;
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u32 misc_features;
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u32 hints;
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u32 nested_features;
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u32 max_vp_index;
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u32 max_lp_index;
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};
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extern struct ms_hyperv_info ms_hyperv;
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typedef int (*hyperv_fill_flush_list_func)(
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struct hv_guest_mapping_flush_list *flush,
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void *data);
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/*
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* Generate the guest ID.
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*/
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static inline __u64 generate_guest_id(__u64 d_info1, __u64 kernel_version,
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__u64 d_info2)
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{
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__u64 guest_id = 0;
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guest_id = (((__u64)HV_LINUX_VENDOR_ID) << 48);
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guest_id |= (d_info1 << 48);
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guest_id |= (kernel_version << 16);
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guest_id |= d_info2;
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return guest_id;
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}
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/* Free the message slot and signal end-of-message if required */
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static inline void vmbus_signal_eom(struct hv_message *msg, u32 old_msg_type)
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{
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/*
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* On crash we're reading some other CPU's message page and we need
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* to be careful: this other CPU may already had cleared the header
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* and the host may already had delivered some other message there.
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* In case we blindly write msg->header.message_type we're going
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* to lose it. We can still lose a message of the same type but
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* we count on the fact that there can only be one
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* CHANNELMSG_UNLOAD_RESPONSE and we don't care about other messages
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* on crash.
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*/
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if (cmpxchg(&msg->header.message_type, old_msg_type,
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HVMSG_NONE) != old_msg_type)
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return;
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/*
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* Make sure the write to MessageType (ie set to
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* HVMSG_NONE) happens before we read the
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* MessagePending and EOMing. Otherwise, the EOMing
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* will not deliver any more messages since there is
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* no empty slot
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*/
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mb();
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if (msg->header.message_flags.msg_pending) {
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/*
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* This will cause message queue rescan to
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* possibly deliver another msg from the
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* hypervisor
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*/
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wrmsrl(HV_X64_MSR_EOM, 0);
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}
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}
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#define hv_init_timer(timer, tick) \
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wrmsrl(HV_X64_MSR_STIMER0_COUNT + (2*timer), tick)
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#define hv_init_timer_config(timer, val) \
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@ -97,6 +28,8 @@ static inline void vmbus_signal_eom(struct hv_message *msg, u32 old_msg_type)
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#define hv_get_vp_index(index) rdmsrl(HV_X64_MSR_VP_INDEX, index)
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#define hv_signal_eom() wrmsrl(HV_X64_MSR_EOM, 0)
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#define hv_get_synint_state(int_num, val) \
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rdmsrl(HV_X64_MSR_SINT0 + int_num, val)
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#define hv_set_synint_state(int_num, val) \
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@ -122,13 +55,6 @@ void hyperv_reenlightenment_vector(void);
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#define trace_hyperv_callback_vector hyperv_callback_vector
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#endif
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void hyperv_vector_handler(struct pt_regs *regs);
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void hv_setup_vmbus_irq(void (*handler)(void));
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void hv_remove_vmbus_irq(void);
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void hv_setup_kexec_handler(void (*handler)(void));
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void hv_remove_kexec_handler(void);
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void hv_setup_crash_handler(void (*handler)(struct pt_regs *regs));
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void hv_remove_crash_handler(void);
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/*
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* Routines for stimer0 Direct Mode handling.
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@ -136,8 +62,6 @@ void hv_remove_crash_handler(void);
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*/
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void hv_stimer0_vector_handler(struct pt_regs *regs);
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void hv_stimer0_callback_vector(void);
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int hv_setup_stimer0_irq(int *irq, int *vector, void (*handler)(void));
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void hv_remove_stimer0_irq(int irq);
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static inline void hv_enable_stimer0_percpu_irq(int irq) {}
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static inline void hv_disable_stimer0_percpu_irq(int irq) {}
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@ -282,14 +206,6 @@ static inline u64 hv_do_rep_hypercall(u16 code, u16 rep_count, u16 varhead_size,
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return status;
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}
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/*
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* Hypervisor's notion of virtual processor ID is different from
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* Linux' notion of CPU ID. This information can only be retrieved
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* in the context of the calling CPU. Setup a map for easy access
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* to this information.
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*/
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extern u32 *hv_vp_index;
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extern u32 hv_max_vp_index;
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extern struct hv_vp_assist_page **hv_vp_assist_page;
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static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
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@ -300,63 +216,8 @@ static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
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return hv_vp_assist_page[cpu];
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}
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/**
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* hv_cpu_number_to_vp_number() - Map CPU to VP.
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* @cpu_number: CPU number in Linux terms
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*
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* This function returns the mapping between the Linux processor
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* number and the hypervisor's virtual processor number, useful
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* in making hypercalls and such that talk about specific
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* processors.
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*
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* Return: Virtual processor number in Hyper-V terms
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*/
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static inline int hv_cpu_number_to_vp_number(int cpu_number)
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{
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return hv_vp_index[cpu_number];
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}
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static inline int cpumask_to_vpset(struct hv_vpset *vpset,
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const struct cpumask *cpus)
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{
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int cpu, vcpu, vcpu_bank, vcpu_offset, nr_bank = 1;
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/* valid_bank_mask can represent up to 64 banks */
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if (hv_max_vp_index / 64 >= 64)
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return 0;
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/*
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* Clear all banks up to the maximum possible bank as hv_tlb_flush_ex
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* structs are not cleared between calls, we risk flushing unneeded
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* vCPUs otherwise.
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*/
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for (vcpu_bank = 0; vcpu_bank <= hv_max_vp_index / 64; vcpu_bank++)
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vpset->bank_contents[vcpu_bank] = 0;
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/*
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* Some banks may end up being empty but this is acceptable.
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*/
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for_each_cpu(cpu, cpus) {
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vcpu = hv_cpu_number_to_vp_number(cpu);
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if (vcpu == VP_INVAL)
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return -1;
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vcpu_bank = vcpu / 64;
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vcpu_offset = vcpu % 64;
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__set_bit(vcpu_offset, (unsigned long *)
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&vpset->bank_contents[vcpu_bank]);
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if (vcpu_bank >= nr_bank)
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nr_bank = vcpu_bank + 1;
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}
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vpset->valid_bank_mask = GENMASK_ULL(nr_bank - 1, 0);
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return nr_bank;
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}
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void __init hyperv_init(void);
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void hyperv_setup_mmu_ops(void);
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void hyperv_report_panic(struct pt_regs *regs, long err);
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void hyperv_report_panic_msg(phys_addr_t pa, size_t size);
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bool hv_is_hyperv_initialized(void);
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void hyperv_cleanup(void);
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void hyperv_reenlightenment_intr(struct pt_regs *regs);
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void set_hv_tscchange_cb(void (*cb)(void));
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@ -379,8 +240,6 @@ static inline void hv_apic_init(void) {}
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#else /* CONFIG_HYPERV */
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static inline void hyperv_init(void) {}
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static inline bool hv_is_hyperv_initialized(void) { return false; }
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static inline void hyperv_cleanup(void) {}
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static inline void hyperv_setup_mmu_ops(void) {}
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static inline void set_hv_tscchange_cb(void (*cb)(void)) {}
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static inline void clear_hv_tscchange_cb(void) {}
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@ -397,4 +256,7 @@ static inline int hyperv_flush_guest_mapping_range(u64 as,
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}
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#endif /* CONFIG_HYPERV */
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#include <asm-generic/mshyperv.h>
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#endif
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@ -2163,6 +2163,7 @@ static void __exit vmbus_exit(void)
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("Microsoft Hyper-V VMBus Driver");
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subsys_initcall(hv_acpi_init);
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module_exit(vmbus_exit);
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@ -0,0 +1,180 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Linux-specific definitions for managing interactions with Microsoft's
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* Hyper-V hypervisor. The definitions in this file are architecture
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* independent. See arch/<arch>/include/asm/mshyperv.h for definitions
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* that are specific to architecture <arch>.
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*
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* Definitions that are specified in the Hyper-V Top Level Functional
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* Spec (TLFS) should not go in this file, but should instead go in
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* hyperv-tlfs.h.
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*
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* Copyright (C) 2019, Microsoft, Inc.
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*
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* Author : Michael Kelley <mikelley@microsoft.com>
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*/
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#ifndef _ASM_GENERIC_MSHYPERV_H
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#define _ASM_GENERIC_MSHYPERV_H
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#include <linux/types.h>
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#include <linux/atomic.h>
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#include <linux/bitops.h>
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#include <linux/cpumask.h>
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#include <asm/ptrace.h>
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#include <asm/hyperv-tlfs.h>
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struct ms_hyperv_info {
|
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u32 features;
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u32 misc_features;
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u32 hints;
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u32 nested_features;
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u32 max_vp_index;
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u32 max_lp_index;
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};
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extern struct ms_hyperv_info ms_hyperv;
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extern u64 hv_do_hypercall(u64 control, void *inputaddr, void *outputaddr);
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extern u64 hv_do_fast_hypercall8(u16 control, u64 input8);
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|
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/* Generate the guest OS identifier as described in the Hyper-V TLFS */
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static inline __u64 generate_guest_id(__u64 d_info1, __u64 kernel_version,
|
||||
__u64 d_info2)
|
||||
{
|
||||
__u64 guest_id = 0;
|
||||
|
||||
guest_id = (((__u64)HV_LINUX_VENDOR_ID) << 48);
|
||||
guest_id |= (d_info1 << 48);
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guest_id |= (kernel_version << 16);
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||||
guest_id |= d_info2;
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||||
|
||||
return guest_id;
|
||||
}
|
||||
|
||||
|
||||
/* Free the message slot and signal end-of-message if required */
|
||||
static inline void vmbus_signal_eom(struct hv_message *msg, u32 old_msg_type)
|
||||
{
|
||||
/*
|
||||
* On crash we're reading some other CPU's message page and we need
|
||||
* to be careful: this other CPU may already had cleared the header
|
||||
* and the host may already had delivered some other message there.
|
||||
* In case we blindly write msg->header.message_type we're going
|
||||
* to lose it. We can still lose a message of the same type but
|
||||
* we count on the fact that there can only be one
|
||||
* CHANNELMSG_UNLOAD_RESPONSE and we don't care about other messages
|
||||
* on crash.
|
||||
*/
|
||||
if (cmpxchg(&msg->header.message_type, old_msg_type,
|
||||
HVMSG_NONE) != old_msg_type)
|
||||
return;
|
||||
|
||||
/*
|
||||
* The cmxchg() above does an implicit memory barrier to
|
||||
* ensure the write to MessageType (ie set to
|
||||
* HVMSG_NONE) happens before we read the
|
||||
* MessagePending and EOMing. Otherwise, the EOMing
|
||||
* will not deliver any more messages since there is
|
||||
* no empty slot
|
||||
*/
|
||||
if (msg->header.message_flags.msg_pending) {
|
||||
/*
|
||||
* This will cause message queue rescan to
|
||||
* possibly deliver another msg from the
|
||||
* hypervisor
|
||||
*/
|
||||
hv_signal_eom();
|
||||
}
|
||||
}
|
||||
|
||||
void hv_setup_vmbus_irq(void (*handler)(void));
|
||||
void hv_remove_vmbus_irq(void);
|
||||
void hv_enable_vmbus_irq(void);
|
||||
void hv_disable_vmbus_irq(void);
|
||||
|
||||
void hv_setup_kexec_handler(void (*handler)(void));
|
||||
void hv_remove_kexec_handler(void);
|
||||
void hv_setup_crash_handler(void (*handler)(struct pt_regs *regs));
|
||||
void hv_remove_crash_handler(void);
|
||||
|
||||
#if IS_ENABLED(CONFIG_HYPERV)
|
||||
/*
|
||||
* Hypervisor's notion of virtual processor ID is different from
|
||||
* Linux' notion of CPU ID. This information can only be retrieved
|
||||
* in the context of the calling CPU. Setup a map for easy access
|
||||
* to this information.
|
||||
*/
|
||||
extern u32 *hv_vp_index;
|
||||
extern u32 hv_max_vp_index;
|
||||
|
||||
/* Sentinel value for an uninitialized entry in hv_vp_index array */
|
||||
#define VP_INVAL U32_MAX
|
||||
|
||||
/**
|
||||
* hv_cpu_number_to_vp_number() - Map CPU to VP.
|
||||
* @cpu_number: CPU number in Linux terms
|
||||
*
|
||||
* This function returns the mapping between the Linux processor
|
||||
* number and the hypervisor's virtual processor number, useful
|
||||
* in making hypercalls and such that talk about specific
|
||||
* processors.
|
||||
*
|
||||
* Return: Virtual processor number in Hyper-V terms
|
||||
*/
|
||||
static inline int hv_cpu_number_to_vp_number(int cpu_number)
|
||||
{
|
||||
return hv_vp_index[cpu_number];
|
||||
}
|
||||
|
||||
static inline int cpumask_to_vpset(struct hv_vpset *vpset,
|
||||
const struct cpumask *cpus)
|
||||
{
|
||||
int cpu, vcpu, vcpu_bank, vcpu_offset, nr_bank = 1;
|
||||
|
||||
/* valid_bank_mask can represent up to 64 banks */
|
||||
if (hv_max_vp_index / 64 >= 64)
|
||||
return 0;
|
||||
|
||||
/*
|
||||
* Clear all banks up to the maximum possible bank as hv_tlb_flush_ex
|
||||
* structs are not cleared between calls, we risk flushing unneeded
|
||||
* vCPUs otherwise.
|
||||
*/
|
||||
for (vcpu_bank = 0; vcpu_bank <= hv_max_vp_index / 64; vcpu_bank++)
|
||||
vpset->bank_contents[vcpu_bank] = 0;
|
||||
|
||||
/*
|
||||
* Some banks may end up being empty but this is acceptable.
|
||||
*/
|
||||
for_each_cpu(cpu, cpus) {
|
||||
vcpu = hv_cpu_number_to_vp_number(cpu);
|
||||
if (vcpu == VP_INVAL)
|
||||
return -1;
|
||||
vcpu_bank = vcpu / 64;
|
||||
vcpu_offset = vcpu % 64;
|
||||
__set_bit(vcpu_offset, (unsigned long *)
|
||||
&vpset->bank_contents[vcpu_bank]);
|
||||
if (vcpu_bank >= nr_bank)
|
||||
nr_bank = vcpu_bank + 1;
|
||||
}
|
||||
vpset->valid_bank_mask = GENMASK_ULL(nr_bank - 1, 0);
|
||||
return nr_bank;
|
||||
}
|
||||
|
||||
void hyperv_report_panic(struct pt_regs *regs, long err);
|
||||
void hyperv_report_panic_msg(phys_addr_t pa, size_t size);
|
||||
bool hv_is_hyperv_initialized(void);
|
||||
void hyperv_cleanup(void);
|
||||
#else /* CONFIG_HYPERV */
|
||||
static inline bool hv_is_hyperv_initialized(void) { return false; }
|
||||
static inline void hyperv_cleanup(void) {}
|
||||
#endif /* CONFIG_HYPERV */
|
||||
|
||||
#if IS_ENABLED(CONFIG_HYPERV)
|
||||
extern int hv_setup_stimer0_irq(int *irq, int *vector, void (*handler)(void));
|
||||
extern void hv_remove_stimer0_irq(int irq);
|
||||
#endif
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue