drm/i915: Wait until after wm optimization to drop runtime PM reference
At the end of an atomic commit, we currently wait for vblanks to
complete, call put() on the various runtime PM references, and then try
to optimize our watermarks (on platforms that need two-step watermark
programming). This can lead to watermark registers being programmed
while the power well is powered down. We need to wait until after
watermark optimization is complete before dropping our runtime power
references.
Note that in the future the watermark optimization is probably going to
move to an asynchronous workqueue task that happens at some arbitrary
point after vblank. When we make that change, we'll no longer
necessarily be operating under the power reference held here, so we'll
need to wrap the watermark register programmin in a call to
intel_runtime_pm_get_if_in_use() or similar.
Cc: arun.siluvery@linux.intel.com
Cc: ville.syrjala@linux.intel.com
Cc: maarten.lankhorst@linux.intel.com
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94349
Fixes: ed4a6a7ca8
("drm/i915: Add two-stage ILK-style watermark programming (v11)")
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1457135979-23727-1-git-send-email-matthew.d.roper@intel.com
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@ -13613,16 +13613,6 @@ static int intel_atomic_commit(struct drm_device *dev,
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if (!state->legacy_cursor_update)
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intel_atomic_wait_for_vblanks(dev, dev_priv, crtc_vblank_mask);
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for_each_crtc_in_state(state, crtc, old_crtc_state, i) {
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intel_post_plane_update(to_intel_crtc_state(old_crtc_state));
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if (put_domains[i])
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modeset_put_power_domains(dev_priv, put_domains[i]);
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}
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if (intel_state->modeset)
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intel_display_power_put(dev_priv, POWER_DOMAIN_MODESET);
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/*
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* Now that the vblank has passed, we can go ahead and program the
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* optimal watermarks on platforms that need two-step watermark
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@ -13637,6 +13627,16 @@ static int intel_atomic_commit(struct drm_device *dev,
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dev_priv->display.optimize_watermarks(intel_cstate);
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}
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for_each_crtc_in_state(state, crtc, old_crtc_state, i) {
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intel_post_plane_update(to_intel_crtc_state(old_crtc_state));
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if (put_domains[i])
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modeset_put_power_domains(dev_priv, put_domains[i]);
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}
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if (intel_state->modeset)
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intel_display_power_put(dev_priv, POWER_DOMAIN_MODESET);
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mutex_lock(&dev->struct_mutex);
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drm_atomic_helper_cleanup_planes(dev, state);
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mutex_unlock(&dev->struct_mutex);
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