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drm/nouveau/clk: allow fb to signal it needs to do a multi-stage reclock 

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
hifive-unleashed-5.1
Ben Skeggs 2013-12-03 08:25:04 +10:00
parent b655f2bb77
commit 1789cab4ef
1 changed files with 6 additions and 3 deletions
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9
drivers/gpu/drm/nouveau/core/subdev/clock/base.c
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@ -182,9 +182,12 @@ nouveau_pstate_prog(struct nouveau_clock *clk, int pstatei)
clk->pstate = pstatei;
if (pfb->ram->calc) {
ret = pfb->ram->calc(pfb, pstate->base.domain[nv_clk_src_mem]);
if (ret == 0)
ret = pfb->ram->prog(pfb);
int khz = pstate->base.domain[nv_clk_src_mem];
do {
ret = pfb->ram->calc(pfb, khz);
if (ret == 0)
ret = pfb->ram->prog(pfb);
} while (ret > 0);
pfb->ram->tidy(pfb);
}