[PARISC] Create shared <asm/ropes.h> header
Pull out struct sba_device and struct lba_device into a common ropes.h header. Also fold the parisc portion of iosapic.h into this file. (Then delete the useless portion of iosapic.h) Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>hifive-unleashed-5.1
Kyle McMartin
Matthew Wilcox
parent
b0eecc4da9
commit
1790cf9111
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@ -146,7 +146,7 @@
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#include <asm/superio.h>
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#endif
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#include <asm/iosapic.h>
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#include <asm/ropes.h>
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#include "./iosapic_private.h"
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#define MODULE_NAME "iosapic"
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@ -46,9 +46,9 @@
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#include <asm/page.h>
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#include <asm/system.h>
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#include <asm/ropes.h>
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#include <asm/hardware.h> /* for register_parisc_driver() stuff */
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#include <asm/parisc-device.h>
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#include <asm/iosapic.h> /* for iosapic_register() */
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#include <asm/io.h> /* read/write stuff */
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#undef DEBUG_LBA /* general stuff */
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@ -169,44 +169,6 @@
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#define LBA_PORT_BASE (PCI_F_EXTEND | 0xfee00000UL)
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static void __iomem *astro_iop_base __read_mostly;
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#define ELROY_HVERS 0x782
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#define MERCURY_HVERS 0x783
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#define QUICKSILVER_HVERS 0x784
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static inline int IS_ELROY(struct parisc_device *d)
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{
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return (d->id.hversion == ELROY_HVERS);
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}
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static inline int IS_MERCURY(struct parisc_device *d)
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{
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return (d->id.hversion == MERCURY_HVERS);
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}
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static inline int IS_QUICKSILVER(struct parisc_device *d)
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{
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return (d->id.hversion == QUICKSILVER_HVERS);
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}
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/*
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** lba_device: Per instance Elroy data structure
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*/
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struct lba_device {
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struct pci_hba_data hba;
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spinlock_t lba_lock;
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void *iosapic_obj;
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#ifdef CONFIG_64BIT
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void __iomem * iop_base; /* PA_VIEW - for IO port accessor funcs */
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#endif
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int flags; /* state/functionality enabled */
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int hw_rev; /* HW revision of chip */
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};
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static u32 lba_t32;
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/* lba flags */
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@ -38,6 +38,7 @@
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#include <linux/proc_fs.h>
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#include <linux/seq_file.h>
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#include <asm/ropes.h>
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#include <asm/mckinley.h> /* for proc_mckinley_root */
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#include <asm/runway.h> /* for proc_runway_root */
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#include <asm/pdc.h> /* for PDC_MODEL_* */
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@ -46,11 +47,6 @@
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#define MODULE_NAME "SBA"
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#ifdef CONFIG_PROC_FS
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/* depends on proc fs support. But costs CPU performance */
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#undef SBA_COLLECT_STATS
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#endif
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/*
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** The number of debug flags is a clue - this code is fragile.
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** Don't even think about messing with it unless you have
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@ -89,46 +85,13 @@
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#define DBG_RES(x...)
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#endif
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#if defined(CONFIG_64BIT)
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/* "low end" PA8800 machines use ZX1 chipset: PAT PDC and only run 64-bit */
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#define ZX1_SUPPORT
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#endif
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#define SBA_INLINE __inline__
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/*
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** The number of pdir entries to "free" before issueing
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** a read to PCOM register to flush out PCOM writes.
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** Interacts with allocation granularity (ie 4 or 8 entries
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** allocated and free'd/purged at a time might make this
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** less interesting).
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*/
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#define DELAYED_RESOURCE_CNT 16
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#define DEFAULT_DMA_HINT_REG 0
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#define ASTRO_RUNWAY_PORT 0x582
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#define IKE_MERCED_PORT 0x803
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#define REO_MERCED_PORT 0x804
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#define REOG_MERCED_PORT 0x805
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#define PLUTO_MCKINLEY_PORT 0x880
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#define SBA_FUNC_ID 0x0000 /* function id */
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#define SBA_FCLASS 0x0008 /* function class, bist, header, rev... */
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static inline int IS_ASTRO(struct parisc_device *d) {
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return d->id.hversion == ASTRO_RUNWAY_PORT;
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}
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static inline int IS_IKE(struct parisc_device *d) {
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return d->id.hversion == IKE_MERCED_PORT;
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}
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static inline int IS_PLUTO(struct parisc_device *d) {
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return d->id.hversion == PLUTO_MCKINLEY_PORT;
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}
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#define SBA_FUNC_SIZE 4096 /* SBA configuration function reg set */
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#define ASTRO_IOC_OFFSET (32 * SBA_FUNC_SIZE)
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@ -145,10 +108,6 @@ static inline int IS_PLUTO(struct parisc_device *d) {
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#define IOC_CTRL_D4 (1 << 11) /* Disable 4-byte coalescing */
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#define IOC_CTRL_DD (1 << 13) /* Disable distr. LMMIO range coalescing */
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#define MAX_IOC 2 /* per Ike. Pluto/Astro only have 1. */
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#define ROPES_PER_IOC 8 /* per Ike half or Pluto/Astro */
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/*
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** Offsets into MBIB (Function 0 on Ike and hopefully Astro)
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@ -196,9 +155,6 @@ static inline int IS_PLUTO(struct parisc_device *d) {
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#define IOC_TCNFG 0x318
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#define IOC_PDIR_BASE 0x320
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/* AGP GART driver looks for this */
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#define SBA_IOMMU_COOKIE 0x0000badbadc0ffeeUL
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/*
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** IOC supports 4/8/16/64KB page sizes (see TCNFG register)
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@ -228,69 +184,6 @@ static inline int IS_PLUTO(struct parisc_device *d) {
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#define SBA_PERF_CNT2 0x208
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#define SBA_PERF_CNT3 0x210
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struct ioc {
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void __iomem *ioc_hpa; /* I/O MMU base address */
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char *res_map; /* resource map, bit == pdir entry */
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u64 *pdir_base; /* physical base address */
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unsigned long ibase; /* pdir IOV Space base - shared w/lba_pci */
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unsigned long imask; /* pdir IOV Space mask - shared w/lba_pci */
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#ifdef ZX1_SUPPORT
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unsigned long iovp_mask; /* help convert IOVA to IOVP */
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#endif
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unsigned long *res_hint; /* next avail IOVP - circular search */
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spinlock_t res_lock;
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unsigned int res_bitshift; /* from the LEFT! */
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unsigned int res_size; /* size of resource map in bytes */
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#ifdef SBA_HINT_SUPPORT
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/* FIXME : DMA HINTs not used */
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unsigned long hint_mask_pdir; /* bits used for DMA hints */
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unsigned int hint_shift_pdir;
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#endif
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#if DELAYED_RESOURCE_CNT > 0
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int saved_cnt;
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struct sba_dma_pair {
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dma_addr_t iova;
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size_t size;
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} saved[DELAYED_RESOURCE_CNT];
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#endif
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#ifdef SBA_COLLECT_STATS
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#define SBA_SEARCH_SAMPLE 0x100
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unsigned long avg_search[SBA_SEARCH_SAMPLE];
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unsigned long avg_idx; /* current index into avg_search */
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unsigned long used_pages;
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unsigned long msingle_calls;
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unsigned long msingle_pages;
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unsigned long msg_calls;
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unsigned long msg_pages;
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unsigned long usingle_calls;
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unsigned long usingle_pages;
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unsigned long usg_calls;
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unsigned long usg_pages;
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#endif
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/* STUFF We don't need in performance path */
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unsigned int pdir_size; /* in bytes, determined by IOV Space size */
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};
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struct sba_device {
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struct sba_device *next; /* list of SBA's in system */
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struct parisc_device *dev; /* dev found in bus walk */
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const char *name;
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void __iomem *sba_hpa; /* base address */
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spinlock_t sba_lock;
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unsigned int flags; /* state/functionality enabled */
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unsigned int hw_rev; /* HW revision of chip */
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struct resource chip_resv; /* MMIO reserved for chip */
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struct resource iommu_resv; /* MMIO reserved for iommu */
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unsigned int num_ioc; /* number of on-board IOC's */
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struct ioc ioc[MAX_IOC];
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};
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static struct sba_device *sba_list;
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static unsigned long ioc_needs_fdc = 0;
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@ -1,53 +0,0 @@
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/*
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** This file is private to iosapic driver.
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** If stuff needs to be used by another driver, move it to a common file.
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**
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** WARNING: fields most data structures here are ordered to make sure
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** they pack nicely for 64-bit compilation. (ie sizeof(long) == 8)
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*/
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/*
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** I/O SAPIC init function
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** Caller knows where an I/O SAPIC is. LBA has an integrated I/O SAPIC.
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** Call setup as part of per instance initialization.
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** (ie *not* init_module() function unless only one is present.)
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** fixup_irq is to initialize PCI IRQ line support and
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** virtualize pcidev->irq value. To be called by pci_fixup_bus().
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*/
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extern void *iosapic_register(unsigned long hpa);
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extern int iosapic_fixup_irq(void *obj, struct pci_dev *pcidev);
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#ifdef __IA64__
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/*
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** PA: PIB (Processor Interrupt Block) is handled by Runway bus adapter.
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** and is hardcoded to 0xfeeNNNN0 where NNNN is id_eid field.
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**
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** IA64: PIB is handled by "Local SAPIC" (integrated in the processor).
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*/
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struct local_sapic_info {
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struct local_sapic_info *lsi_next; /* point to next CPU info */
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int *lsi_cpu_id; /* point to logical CPU id */
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unsigned long *lsi_id_eid; /* point to IA-64 CPU id */
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int *lsi_status; /* point to CPU status */
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void *lsi_private; /* point to special info */
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};
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/*
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** "root" data structure which ties everything together.
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** Should always be able to start with sapic_root and locate
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** the desired information.
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*/
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struct sapic_info {
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struct sapic_info *si_next; /* info is per cell */
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int si_cellid; /* cell id */
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unsigned int si_status; /* status */
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char *si_pib_base; /* intr blk base address */
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local_sapic_info_t *si_local_info;
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io_sapic_info_t *si_io_info;
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extint_info_t *si_extint_info;/* External Intr info */
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};
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#endif /* IA64 */
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@ -0,0 +1,150 @@
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#ifndef _ASM_PARISC_ROPES_H_
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#define _ASM_PARISC_ROPES_H_
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#ifdef CONFIG_64BIT
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/* "low end" PA8800 machines use ZX1 chipset: PAT PDC and only run 64-bit */
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#define ZX1_SUPPORT
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#endif
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#ifdef CONFIG_PROC_FS
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/* depends on proc fs support. But costs CPU performance */
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#undef SBA_COLLECT_STATS
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#endif
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/*
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** The number of pdir entries to "free" before issueing
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** a read to PCOM register to flush out PCOM writes.
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** Interacts with allocation granularity (ie 4 or 8 entries
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** allocated and free'd/purged at a time might make this
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** less interesting).
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*/
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#define DELAYED_RESOURCE_CNT 16
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#define MAX_IOC 2 /* per Ike. Pluto/Astro only have 1. */
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#define ROPES_PER_IOC 8 /* per Ike half or Pluto/Astro */
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struct ioc {
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void __iomem *ioc_hpa; /* I/O MMU base address */
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char *res_map; /* resource map, bit == pdir entry */
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u64 *pdir_base; /* physical base address */
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unsigned long ibase; /* pdir IOV Space base - shared w/lba_pci */
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unsigned long imask; /* pdir IOV Space mask - shared w/lba_pci */
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#ifdef ZX1_SUPPORT
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unsigned long iovp_mask; /* help convert IOVA to IOVP */
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#endif
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unsigned long *res_hint; /* next avail IOVP - circular search */
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spinlock_t res_lock;
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unsigned int res_bitshift; /* from the LEFT! */
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unsigned int res_size; /* size of resource map in bytes */
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#ifdef SBA_HINT_SUPPORT
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/* FIXME : DMA HINTs not used */
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unsigned long hint_mask_pdir; /* bits used for DMA hints */
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unsigned int hint_shift_pdir;
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#endif
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#if DELAYED_RESOURCE_CNT > 0
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int saved_cnt;
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struct sba_dma_pair {
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dma_addr_t iova;
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size_t size;
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} saved[DELAYED_RESOURCE_CNT];
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#endif
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#ifdef SBA_COLLECT_STATS
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#define SBA_SEARCH_SAMPLE 0x100
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unsigned long avg_search[SBA_SEARCH_SAMPLE];
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unsigned long avg_idx; /* current index into avg_search */
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unsigned long used_pages;
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unsigned long msingle_calls;
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unsigned long msingle_pages;
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unsigned long msg_calls;
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unsigned long msg_pages;
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unsigned long usingle_calls;
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unsigned long usingle_pages;
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unsigned long usg_calls;
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unsigned long usg_pages;
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#endif
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/* STUFF We don't need in performance path */
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unsigned int pdir_size; /* in bytes, determined by IOV Space size */
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};
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struct sba_device {
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struct sba_device *next; /* list of SBA's in system */
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struct parisc_device *dev; /* dev found in bus walk */
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const char *name;
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void __iomem *sba_hpa; /* base address */
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spinlock_t sba_lock;
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unsigned int flags; /* state/functionality enabled */
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unsigned int hw_rev; /* HW revision of chip */
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struct resource chip_resv; /* MMIO reserved for chip */
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struct resource iommu_resv; /* MMIO reserved for iommu */
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unsigned int num_ioc; /* number of on-board IOC's */
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struct ioc ioc[MAX_IOC];
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};
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#define ASTRO_RUNWAY_PORT 0x582
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#define IKE_MERCED_PORT 0x803
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#define REO_MERCED_PORT 0x804
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#define REOG_MERCED_PORT 0x805
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#define PLUTO_MCKINLEY_PORT 0x880
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static inline int IS_ASTRO(struct parisc_device *d) {
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return d->id.hversion == ASTRO_RUNWAY_PORT;
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}
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static inline int IS_IKE(struct parisc_device *d) {
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return d->id.hversion == IKE_MERCED_PORT;
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}
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static inline int IS_PLUTO(struct parisc_device *d) {
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return d->id.hversion == PLUTO_MCKINLEY_PORT;
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}
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#define SBA_IOMMU_COOKIE 0x0000badbadc0ffeeUL
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/*
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** lba_device: Per instance Elroy data structure
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*/
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struct lba_device {
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struct pci_hba_data hba;
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spinlock_t lba_lock;
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void *iosapic_obj;
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#ifdef CONFIG_64BIT
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void __iomem *iop_base; /* PA_VIEW - for IO port accessor funcs */
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#endif
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int flags; /* state/functionality enabled */
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int hw_rev; /* HW revision of chip */
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};
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#define ELROY_HVERS 0x782
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#define MERCURY_HVERS 0x783
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#define QUICKSILVER_HVERS 0x784
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static inline int IS_ELROY(struct parisc_device *d) {
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return (d->id.hversion == ELROY_HVERS);
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}
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static inline int IS_MERCURY(struct parisc_device *d) {
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return (d->id.hversion == MERCURY_HVERS);
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}
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static inline int IS_QUICKSILVER(struct parisc_device *d) {
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return (d->id.hversion == QUICKSILVER_HVERS);
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}
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/*
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** I/O SAPIC init function
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** Caller knows where an I/O SAPIC is. LBA has an integrated I/O SAPIC.
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** Call setup as part of per instance initialization.
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** (ie *not* init_module() function unless only one is present.)
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** fixup_irq is to initialize PCI IRQ line support and
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** virtualize pcidev->irq value. To be called by pci_fixup_bus().
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*/
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extern void *iosapic_register(unsigned long hpa);
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extern int iosapic_fixup_irq(void *obj, struct pci_dev *pcidev);
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#endif /*_ASM_PARISC_ROPES_H_*/
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