powerpc: 64bit optimised __clear_user
I noticed __clear_user high up in a profile of one of my RAID stress tests. The testcase was doing a dd from /dev/zero which ends up calling __clear_user. __clear_user is basically a loop with a single 4 byte store which is horribly slow. We can do much better by aligning the desination and doing 32 bytes of 8 byte stores in a loop. The following testcase was used to verify the patch: http://ozlabs.org/~anton/junkcode/stress_clear_user.c To show the improvement in performance I ran a dd from /dev/zero to /dev/null on a POWER7 box: Before: # dd if=/dev/zero of=/dev/null bs=1M count=10000 10485760000 bytes (10 GB) copied, 3.72379 s, 2.8 GB/s After: # time dd if=/dev/zero of=/dev/null bs=1M count=10000 10485760000 bytes (10 GB) copied, 0.728318 s, 14.4 GB/s Over 5x faster. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>hifive-unleashed-5.1
Anton Blanchard
Benjamin Herrenschmidt
parent
d136e27326
commit
17968fbbd1
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@ -17,7 +17,7 @@ obj-$(CONFIG_HAS_IOMEM) += devres.o
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obj-$(CONFIG_PPC64) += copypage_64.o copyuser_64.o \
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memcpy_64.o usercopy_64.o mem_64.o string.o \
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checksum_wrappers_64.o hweight_64.o \
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copyuser_power7.o
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copyuser_power7.o string_64.o
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obj-$(CONFIG_XMON) += sstep.o ldstfp.o
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obj-$(CONFIG_KPROBES) += sstep.o ldstfp.o
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obj-$(CONFIG_HAVE_HW_BREAKPOINT) += sstep.o ldstfp.o
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@ -119,6 +119,7 @@ _GLOBAL(memchr)
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2: li r3,0
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blr
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#ifdef CONFIG_PPC32
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_GLOBAL(__clear_user)
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addi r6,r3,-4
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li r3,0
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@ -160,3 +161,4 @@ _GLOBAL(__clear_user)
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PPC_LONG 1b,91b
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PPC_LONG 8b,92b
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.text
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#endif
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@ -0,0 +1,141 @@
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*
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* Copyright (C) IBM Corporation, 2012
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*
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* Author: Anton Blanchard <anton@au.ibm.com>
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*/
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#include <asm/ppc_asm.h>
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/**
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* __clear_user: - Zero a block of memory in user space, with less checking.
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* @to: Destination address, in user space.
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* @n: Number of bytes to zero.
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*
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* Zero a block of memory in user space. Caller must check
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* the specified block with access_ok() before calling this function.
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*
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* Returns number of bytes that could not be cleared.
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* On success, this will be zero.
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*/
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.macro err1
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100:
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.section __ex_table,"a"
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.align 3
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.llong 100b,.Ldo_err1
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.previous
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.endm
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.macro err2
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200:
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.section __ex_table,"a"
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.align 3
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.llong 200b,.Ldo_err2
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.previous
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.endm
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.macro err3
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300:
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.section __ex_table,"a"
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.align 3
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.llong 300b,.Ldo_err3
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.previous
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.endm
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.Ldo_err1:
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mr r3,r8
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.Ldo_err2:
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mtctr r4
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1:
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err3; stb r0,0(r3)
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addi r3,r3,1
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addi r4,r4,-1
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bdnz 1b
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.Ldo_err3:
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mr r3,r4
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blr
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_GLOBAL(__clear_user)
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cmpdi r4,32
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neg r6,r3
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li r0,0
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blt .Lshort_clear
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mr r8,r3
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mtocrf 0x01,r6
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clrldi r6,r6,(64-3)
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/* Get the destination 8 byte aligned */
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bf cr7*4+3,1f
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err1; stb r0,0(r3)
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addi r3,r3,1
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1: bf cr7*4+2,2f
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err1; sth r0,0(r3)
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addi r3,r3,2
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2: bf cr7*4+1,3f
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err1; stw r0,0(r3)
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addi r3,r3,4
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3: sub r4,r4,r6
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srdi r6,r4,5
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cmpdi r4,32
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blt .Lshort_clear
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mtctr r6
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/* Do 32 byte chunks */
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4:
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err2; std r0,0(r3)
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err2; std r0,8(r3)
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err2; std r0,16(r3)
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err2; std r0,24(r3)
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addi r3,r3,32
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addi r4,r4,-32
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bdnz 4b
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.Lshort_clear:
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/* up to 31 bytes to go */
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cmpdi r4,16
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blt 6f
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err2; std r0,0(r3)
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err2; std r0,8(r3)
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addi r3,r3,16
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addi r4,r4,-16
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/* Up to 15 bytes to go */
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6: mr r8,r3
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clrldi r4,r4,(64-4)
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mtocrf 0x01,r4
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bf cr7*4+0,7f
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err1; std r0,0(r3)
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addi r3,r3,8
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7: bf cr7*4+1,8f
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err1; stw r0,0(r3)
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addi r3,r3,4
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8: bf cr7*4+2,9f
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err1; sth r0,0(r3)
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addi r3,r3,2
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9: bf cr7*4+3,10f
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err1; stb r0,0(r3)
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10: li r3,0
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blr
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