clk: imx: Rename sccg and frac pll register to suggest clk_hw
Renaming the imx_clk_frac_pll and imx_clk_sccg_pll register functions to imx_clk_hw_frac_pll, respectively imx_clk_hw_sccg_pll to be more obvious that they are clk_hw based. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -201,8 +201,9 @@ static const struct clk_ops clk_frac_pll_ops = {
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.set_rate = clk_pll_set_rate,
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};
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struct clk *imx_clk_frac_pll(const char *name, const char *parent_name,
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void __iomem *base)
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struct clk_hw *imx_clk_hw_frac_pll(const char *name,
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const char *parent_name,
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void __iomem *base)
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{
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struct clk_init_data init;
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struct clk_frac_pll *pll;
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@ -230,5 +231,5 @@ struct clk *imx_clk_frac_pll(const char *name, const char *parent_name,
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return ERR_PTR(ret);
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}
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return hw->clk;
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return hw;
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}
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@ -506,7 +506,7 @@ static const struct clk_ops clk_sscg_pll_ops = {
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.determine_rate = clk_sscg_pll_determine_rate,
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};
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struct clk *imx_clk_sscg_pll(const char *name,
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struct clk_hw *imx_clk_hw_sscg_pll(const char *name,
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const char * const *parent_names,
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u8 num_parents,
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u8 parent, u8 bypass1, u8 bypass2,
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@ -545,5 +545,5 @@ struct clk *imx_clk_sscg_pll(const char *name,
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return ERR_PTR(ret);
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}
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return hw->clk;
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return hw;
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}
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@ -116,6 +116,14 @@ extern struct imx_pll14xx_clk imx_1443x_dram_pll;
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#define imx_clk_pllv2(name, parent, base) \
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to_clk(imx_clk_hw_pllv2(name, parent, base))
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#define imx_clk_frac_pll(name, parent_name, base) \
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to_clk(imx_clk_hw_frac_pll(name, parent_name, base))
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#define imx_clk_sscg_pll(name, parent_names, num_parents, parent,\
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bypass1, bypass2, base, flags) \
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to_clk(imx_clk_hw_sscg_pll(name, parent_names, num_parents, parent,\
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bypass1, bypass2, base, flags))
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struct clk *imx_clk_pll14xx(const char *name, const char *parent_name,
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void __iomem *base, const struct imx_pll14xx_clk *pll_clk);
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@ -125,10 +133,10 @@ struct clk_hw *imx_clk_hw_pllv1(enum imx_pllv1_type type, const char *name,
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struct clk_hw *imx_clk_hw_pllv2(const char *name, const char *parent,
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void __iomem *base);
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struct clk *imx_clk_frac_pll(const char *name, const char *parent_name,
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struct clk_hw *imx_clk_hw_frac_pll(const char *name, const char *parent_name,
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void __iomem *base);
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struct clk *imx_clk_sscg_pll(const char *name,
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struct clk_hw *imx_clk_hw_sscg_pll(const char *name,
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const char * const *parent_names,
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u8 num_parents,
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u8 parent, u8 bypass1, u8 bypass2,
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