IB/ipath: Lock and always use shadow copies of GPIO register
The new LED blinking interface adds more contention for the unprotected GPIO pins that were already shared, though not commonly at the same time. We add locks to the accesses to these pins so that Read-Modify-Write is now safe. Some of these locks are added at interrupt context, so we shadow the registers which drive and inspect these pins to avoid the mmio read/writes. This mitigates the effects of the locks and hastens us through the interrupt. Add locking and always use shadows for registers controlling GPIO pins (ExtCtrl and GPIOout). The use of shadows implies doing less I/O, which can make I2C operation too fast on some platforms. An explicit udelay(1) in SCL manipulation fixes that. Signed-off-by: Michael Albaugh <michael.albaugh@qlogic.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
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@ -95,39 +95,37 @@ static int i2c_gpio_set(struct ipath_devdata *dd,
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enum i2c_type line,
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enum i2c_state new_line_state)
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{
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u64 read_val, write_val, mask, *gpioval;
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u64 out_mask, dir_mask, *gpioval;
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unsigned long flags = 0;
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gpioval = &dd->ipath_gpio_out;
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read_val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_extctrl);
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if (line == i2c_line_scl)
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mask = dd->ipath_gpio_scl;
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else
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mask = dd->ipath_gpio_sda;
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if (new_line_state == i2c_line_high)
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/* tri-state the output rather than force high */
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write_val = read_val & ~mask;
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else
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/* config line to be an output */
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write_val = read_val | mask;
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ipath_write_kreg(dd, dd->ipath_kregs->kr_extctrl, write_val);
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/* set high and verify */
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if (new_line_state == i2c_line_high)
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write_val = 0x1UL;
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else
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write_val = 0x0UL;
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if (line == i2c_line_scl) {
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write_val <<= dd->ipath_gpio_scl_num;
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*gpioval = *gpioval & ~(1UL << dd->ipath_gpio_scl_num);
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*gpioval |= write_val;
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dir_mask = dd->ipath_gpio_scl;
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out_mask = (1UL << dd->ipath_gpio_scl_num);
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} else {
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write_val <<= dd->ipath_gpio_sda_num;
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*gpioval = *gpioval & ~(1UL << dd->ipath_gpio_sda_num);
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*gpioval |= write_val;
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dir_mask = dd->ipath_gpio_sda;
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out_mask = (1UL << dd->ipath_gpio_sda_num);
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}
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spin_lock_irqsave(&dd->ipath_gpio_lock, flags);
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if (new_line_state == i2c_line_high) {
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/* tri-state the output rather than force high */
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dd->ipath_extctrl &= ~dir_mask;
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} else {
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/* config line to be an output */
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dd->ipath_extctrl |= dir_mask;
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}
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ipath_write_kreg(dd, dd->ipath_kregs->kr_extctrl, dd->ipath_extctrl);
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/* set output as well (no real verify) */
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if (new_line_state == i2c_line_high)
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*gpioval |= out_mask;
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else
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*gpioval &= ~out_mask;
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ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_out, *gpioval);
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spin_unlock_irqrestore(&dd->ipath_gpio_lock, flags);
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return 0;
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}
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@ -145,8 +143,9 @@ static int i2c_gpio_get(struct ipath_devdata *dd,
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enum i2c_type line,
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enum i2c_state *curr_statep)
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{
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u64 read_val, write_val, mask;
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u64 read_val, mask;
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int ret;
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unsigned long flags = 0;
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/* check args */
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if (curr_statep == NULL) {
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@ -154,15 +153,21 @@ static int i2c_gpio_get(struct ipath_devdata *dd,
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goto bail;
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}
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read_val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_extctrl);
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/* config line to be an input */
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if (line == i2c_line_scl)
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mask = dd->ipath_gpio_scl;
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else
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mask = dd->ipath_gpio_sda;
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write_val = read_val & ~mask;
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ipath_write_kreg(dd, dd->ipath_kregs->kr_extctrl, write_val);
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spin_lock_irqsave(&dd->ipath_gpio_lock, flags);
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dd->ipath_extctrl &= ~mask;
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ipath_write_kreg(dd, dd->ipath_kregs->kr_extctrl, dd->ipath_extctrl);
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/*
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* Below is very unlikely to reflect true input state if Output
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* Enable actually changed.
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*/
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read_val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_extstatus);
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spin_unlock_irqrestore(&dd->ipath_gpio_lock, flags);
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if (read_val & mask)
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*curr_statep = i2c_line_high;
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@ -192,6 +197,7 @@ static void i2c_wait_for_writes(struct ipath_devdata *dd)
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static void scl_out(struct ipath_devdata *dd, u8 bit)
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{
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udelay(1);
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i2c_gpio_set(dd, i2c_line_scl, bit ? i2c_line_high : i2c_line_low);
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i2c_wait_for_writes(dd);
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@ -314,12 +320,18 @@ static int eeprom_reset(struct ipath_devdata *dd)
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int clock_cycles_left = 9;
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u64 *gpioval = &dd->ipath_gpio_out;
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int ret;
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unsigned long flags;
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eeprom_init = 1;
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spin_lock_irqsave(&dd->ipath_gpio_lock, flags);
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/* Make sure shadows are consistent */
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dd->ipath_extctrl = ipath_read_kreg64(dd, dd->ipath_kregs->kr_extctrl);
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*gpioval = ipath_read_kreg64(dd, dd->ipath_kregs->kr_gpio_out);
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spin_unlock_irqrestore(&dd->ipath_gpio_lock, flags);
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ipath_cdbg(VERBOSE, "Resetting i2c eeprom; initial gpioout reg "
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"is %llx\n", (unsigned long long) *gpioval);
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eeprom_init = 1;
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/*
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* This is to get the i2c into a known state, by first going low,
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* then tristate sda (and then tristate scl as first thing
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@ -1059,6 +1059,7 @@ static void ipath_setup_ht_setextled(struct ipath_devdata *dd,
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u64 lst, u64 ltst)
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{
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u64 extctl;
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unsigned long flags = 0;
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/* the diags use the LED to indicate diag info, so we leave
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* the external LED alone when the diags are running */
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@ -1075,6 +1076,7 @@ static void ipath_setup_ht_setextled(struct ipath_devdata *dd,
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: INFINIPATH_IBCS_L_STATE_DOWN;
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}
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spin_lock_irqsave(&dd->ipath_gpio_lock, flags);
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/*
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* start by setting both LED control bits to off, then turn
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* on the appropriate bit(s).
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@ -1103,6 +1105,7 @@ static void ipath_setup_ht_setextled(struct ipath_devdata *dd,
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}
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dd->ipath_extctrl = extctl;
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ipath_write_kreg(dd, dd->ipath_kregs->kr_extctrl, extctl);
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spin_unlock_irqrestore(&dd->ipath_gpio_lock, flags);
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}
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static void ipath_init_ht_variables(struct ipath_devdata *dd)
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@ -791,6 +791,7 @@ static void ipath_setup_pe_setextled(struct ipath_devdata *dd, u64 lst,
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u64 ltst)
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{
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u64 extctl;
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unsigned long flags = 0;
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/* the diags use the LED to indicate diag info, so we leave
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* the external LED alone when the diags are running */
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@ -807,6 +808,7 @@ static void ipath_setup_pe_setextled(struct ipath_devdata *dd, u64 lst,
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: INFINIPATH_IBCS_L_STATE_DOWN;
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}
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spin_lock_irqsave(&dd->ipath_gpio_lock, flags);
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extctl = dd->ipath_extctrl & ~(INFINIPATH_EXTC_LED1PRIPORT_ON |
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INFINIPATH_EXTC_LED2PRIPORT_ON);
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@ -816,6 +818,7 @@ static void ipath_setup_pe_setextled(struct ipath_devdata *dd, u64 lst,
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extctl |= INFINIPATH_EXTC_LED1PRIPORT_ON;
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dd->ipath_extctrl = extctl;
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ipath_write_kreg(dd, dd->ipath_kregs->kr_extctrl, extctl);
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spin_unlock_irqrestore(&dd->ipath_gpio_lock, flags);
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}
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/**
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@ -340,6 +340,8 @@ static int init_chip_first(struct ipath_devdata *dd,
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spin_lock_init(&dd->ipath_tid_lock);
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spin_lock_init(&dd->ipath_gpio_lock);
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done:
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*pdp = pd;
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return ret;
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@ -399,6 +399,8 @@ struct ipath_devdata {
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u64 ipath_gpio_out;
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/* shadow the gpio mask register */
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u64 ipath_gpio_mask;
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/* shadow the gpio output enable, etc... */
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u64 ipath_extctrl;
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/* kr_revision shadow */
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u64 ipath_revision;
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/*
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@ -473,8 +475,6 @@ struct ipath_devdata {
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u32 ipath_cregbase;
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/* shadow the control register contents */
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u32 ipath_control;
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/* shadow the gpio output contents */
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u32 ipath_extctrl;
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/* PCI revision register (HTC rev on FPGA) */
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u32 ipath_pcirev;
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@ -576,6 +576,9 @@ struct ipath_devdata {
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u64 ipath_gpio_sda;
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u64 ipath_gpio_scl;
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/* lock for doing RMW of shadows/regs for ExtCtrl and GPIO */
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spinlock_t ipath_gpio_lock;
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/* used to override LED behavior */
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u8 ipath_led_override; /* Substituted for normal value, if non-zero */
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u16 ipath_led_override_timeoff; /* delta to next timer event */
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