irqchip/gic-v3: Parse and export virtual GIC information
Fill up the recently introduced gic_kvm_info with the hardware information used for virtualization. Signed-off-by: Julien Grall <julien.grall@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>hifive-unleashed-5.1
Julien Grall
Christoffer Dall
parent
611f039f5e
commit
1839e57696
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@ -30,6 +30,7 @@
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#include <linux/slab.h>
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#include <linux/irqchip.h>
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#include <linux/irqchip/arm-gic-common.h>
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#include <linux/irqchip/arm-gic-v3.h>
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#include <asm/cputype.h>
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@ -58,6 +59,8 @@ struct gic_chip_data {
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static struct gic_chip_data gic_data __read_mostly;
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static struct static_key supports_deactivate = STATIC_KEY_INIT_TRUE;
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static struct gic_kvm_info gic_v3_kvm_info;
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#define gic_data_rdist() (this_cpu_ptr(gic_data.rdists.rdist))
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#define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base)
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#define gic_data_rdist_sgi_base() (gic_data_rdist_rd_base() + SZ_64K)
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@ -903,6 +906,30 @@ static int __init gic_validate_dist_version(void __iomem *dist_base)
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return 0;
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}
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static void __init gic_of_setup_kvm_info(struct device_node *node)
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{
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int ret;
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struct resource r;
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u32 gicv_idx;
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gic_v3_kvm_info.type = GIC_V3;
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gic_v3_kvm_info.maint_irq = irq_of_parse_and_map(node, 0);
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if (!gic_v3_kvm_info.maint_irq)
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return;
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if (of_property_read_u32(node, "#redistributor-regions",
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&gicv_idx))
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gicv_idx = 1;
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gicv_idx += 3; /* Also skip GICD, GICC, GICH */
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ret = of_address_to_resource(node, gicv_idx, &r);
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if (!ret)
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gic_v3_kvm_info.vcpu = r;
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gic_set_kvm_info(&gic_v3_kvm_info);
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}
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static int __init gic_of_init(struct device_node *node, struct device_node *parent)
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{
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void __iomem *dist_base;
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@ -954,8 +981,10 @@ static int __init gic_of_init(struct device_node *node, struct device_node *pare
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err = gic_init_bases(dist_base, rdist_regs, nr_redist_regions,
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redist_stride, &node->fwnode);
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if (!err)
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if (!err) {
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gic_of_setup_kvm_info(node);
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return 0;
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}
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out_unmap_rdist:
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for (i = 0; i < nr_redist_regions; i++)
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@ -976,6 +1005,9 @@ static struct
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struct redist_region *redist_regs;
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u32 nr_redist_regions;
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bool single_redist;
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u32 maint_irq;
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int maint_irq_mode;
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phys_addr_t vcpu_base;
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} acpi_data __initdata;
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static void __init
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@ -1112,7 +1144,85 @@ static bool __init acpi_validate_gic_table(struct acpi_subtable_header *header,
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return true;
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}
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static int __init gic_acpi_parse_virt_madt_gicc(struct acpi_subtable_header *header,
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const unsigned long end)
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{
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struct acpi_madt_generic_interrupt *gicc =
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(struct acpi_madt_generic_interrupt *)header;
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int maint_irq_mode;
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static int first_madt = true;
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/* Skip unusable CPUs */
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if (!(gicc->flags & ACPI_MADT_ENABLED))
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return 0;
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maint_irq_mode = (gicc->flags & ACPI_MADT_VGIC_IRQ_MODE) ?
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ACPI_EDGE_SENSITIVE : ACPI_LEVEL_SENSITIVE;
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if (first_madt) {
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first_madt = false;
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acpi_data.maint_irq = gicc->vgic_interrupt;
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acpi_data.maint_irq_mode = maint_irq_mode;
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acpi_data.vcpu_base = gicc->gicv_base_address;
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return 0;
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}
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/*
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* The maintenance interrupt and GICV should be the same for every CPU
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*/
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if ((acpi_data.maint_irq != gicc->vgic_interrupt) ||
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(acpi_data.maint_irq_mode != maint_irq_mode) ||
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(acpi_data.vcpu_base != gicc->gicv_base_address))
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return -EINVAL;
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return 0;
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}
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static bool __init gic_acpi_collect_virt_info(void)
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{
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int count;
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count = acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,
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gic_acpi_parse_virt_madt_gicc, 0);
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return (count > 0);
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}
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#define ACPI_GICV3_DIST_MEM_SIZE (SZ_64K)
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#define ACPI_GICV2_VCTRL_MEM_SIZE (SZ_4K)
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#define ACPI_GICV2_VCPU_MEM_SIZE (SZ_8K)
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static void __init gic_acpi_setup_kvm_info(void)
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{
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int irq;
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if (!gic_acpi_collect_virt_info()) {
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pr_warn("Unable to get hardware information used for virtualization\n");
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return;
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}
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gic_v3_kvm_info.type = GIC_V3;
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irq = acpi_register_gsi(NULL, acpi_data.maint_irq,
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acpi_data.maint_irq_mode,
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ACPI_ACTIVE_HIGH);
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if (irq <= 0)
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return;
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gic_v3_kvm_info.maint_irq = irq;
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if (acpi_data.vcpu_base) {
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struct resource *vcpu = &gic_v3_kvm_info.vcpu;
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vcpu->flags = IORESOURCE_MEM;
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vcpu->start = acpi_data.vcpu_base;
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vcpu->end = vcpu->start + ACPI_GICV2_VCPU_MEM_SIZE - 1;
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}
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gic_set_kvm_info(&gic_v3_kvm_info);
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}
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static int __init
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gic_acpi_init(struct acpi_subtable_header *header, const unsigned long end)
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@ -1161,6 +1271,8 @@ gic_acpi_init(struct acpi_subtable_header *header, const unsigned long end)
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goto out_fwhandle_free;
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acpi_set_irq_model(ACPI_IRQ_MODEL_GIC, domain_handle);
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gic_acpi_setup_kvm_info();
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return 0;
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out_fwhandle_free:
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@ -15,6 +15,7 @@
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enum gic_type {
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GIC_V2,
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GIC_V3,
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};
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struct gic_kvm_info {
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