mtd: nand: mtk: fix incorrect register setting order about ecc irq
Currently, we trigger ECC HW before setting ecc irq. It is incorrect.
Because ECC starts working once the register ECC_CTL_REG is set as
ECC_OP_ENABLE. And this may lead an abnormal behavior of ecc irq.
So, should enable ecc irq at first, then trigger ECC.
Fixes: 1d6b1e4649
("mtd: mediatek: driver for MTK Smart Device")
Signed-off-by: Xiaolei Li <xiaolei.li@mediatek.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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@ -276,8 +276,6 @@ int mtk_ecc_enable(struct mtk_ecc *ecc, struct mtk_ecc_config *config)
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if (ret)
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return ret;
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writew(ECC_OP_ENABLE, ecc->regs + ECC_CTL_REG(op));
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init_completion(&ecc->done);
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reg_val = ECC_IRQ_EN;
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/*
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@ -289,6 +287,8 @@ int mtk_ecc_enable(struct mtk_ecc *ecc, struct mtk_ecc_config *config)
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reg_val |= ECC_PG_IRQ_SEL;
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writew(reg_val, ecc->regs + ECC_IRQ_REG(op));
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writew(ECC_OP_ENABLE, ecc->regs + ECC_CTL_REG(op));
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return 0;
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}
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EXPORT_SYMBOL(mtk_ecc_enable);
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