ath9k: Process the AIC calibration results
This patch adds support for post-processing the AIC calibration results. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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@ -20,6 +20,22 @@
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#include "ar9003_aic.h"
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#include "reg_aic.h"
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static const u8 com_att_db_table[ATH_AIC_MAX_COM_ATT_DB_TABLE] = {
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0, 3, 9, 15, 21, 27
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};
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static const u16 aic_lin_table[ATH_AIC_MAX_AIC_LIN_TABLE] = {
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8191, 7300, 6506, 5799, 5168, 4606, 4105, 3659,
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3261, 2906, 2590, 2309, 2057, 1834, 1634, 1457,
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1298, 1157, 1031, 919, 819, 730, 651, 580,
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517, 461, 411, 366, 326, 291, 259, 231,
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206, 183, 163, 146, 130, 116, 103, 92,
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82, 73, 65, 58, 52, 46, 41, 37,
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33, 29, 26, 23, 21, 18, 16, 15,
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13, 12, 10, 9, 8, 7, 7, 6,
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5, 5, 4, 4, 3
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};
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static bool ar9003_hw_is_aic_enabled(struct ath_hw *ah)
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{
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struct ath9k_hw_mci *mci_hw = &ah->btcoex_hw.mci;
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@ -30,6 +46,56 @@ static bool ar9003_hw_is_aic_enabled(struct ath_hw *ah)
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return true;
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}
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static int16_t ar9003_aic_find_valid(struct ath_aic_sram_info *cal_sram,
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bool dir, u8 index)
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{
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int16_t i;
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if (dir) {
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for (i = index + 1; i < ATH_AIC_MAX_BT_CHANNEL; i++) {
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if (cal_sram[i].valid)
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break;
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}
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} else {
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for (i = index - 1; i >= 0; i--) {
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if (cal_sram[i].valid)
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break;
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}
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}
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if ((i >= ATH_AIC_MAX_BT_CHANNEL) || (i < 0))
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i = -1;
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return i;
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}
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/*
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* type 0: aic_lin_table, 1: com_att_db_table
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*/
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static int16_t ar9003_aic_find_index(u8 type, int16_t value)
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{
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int16_t i = -1;
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if (type == 0) {
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for (i = ATH_AIC_MAX_AIC_LIN_TABLE - 1; i >= 0; i--) {
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if (aic_lin_table[i] >= value)
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break;
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}
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} else if (type == 1) {
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for (i = 0; i < ATH_AIC_MAX_COM_ATT_DB_TABLE; i++) {
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if (com_att_db_table[i] > value) {
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i--;
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break;
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}
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}
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if (i >= ATH_AIC_MAX_COM_ATT_DB_TABLE)
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i = -1;
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}
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return i;
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}
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static void ar9003_aic_gain_table(struct ath_hw *ah)
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{
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u32 aic_atten_word[19], i;
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@ -186,12 +252,191 @@ static void ar9003_aic_cal_start(struct ath_hw *ah, u8 min_valid_count)
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aic->aic_cal_state = AIC_CAL_STATE_STARTED;
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}
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static bool ar9003_aic_cal_post_process(struct ath_hw *ah)
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{
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struct ath9k_hw_aic *aic = &ah->btcoex_hw.aic;
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struct ath_aic_sram_info cal_sram[ATH_AIC_MAX_BT_CHANNEL];
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struct ath_aic_out_info aic_sram[ATH_AIC_MAX_BT_CHANNEL];
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u32 dir_path_gain_idx, quad_path_gain_idx, value;
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u32 fixed_com_att_db;
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int8_t dir_path_sign, quad_path_sign;
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int16_t i;
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bool ret = true;
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memset(&cal_sram, 0, sizeof(cal_sram));
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memset(&aic_sram, 0, sizeof(aic_sram));
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for (i = 0; i < ATH_AIC_MAX_BT_CHANNEL; i++) {
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value = aic->aic_sram[i];
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cal_sram[i].valid =
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MS(value, AR_PHY_AIC_SRAM_VALID);
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cal_sram[i].rot_quad_att_db =
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MS(value, AR_PHY_AIC_SRAM_ROT_QUAD_ATT_DB);
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cal_sram[i].vga_quad_sign =
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MS(value, AR_PHY_AIC_SRAM_VGA_QUAD_SIGN);
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cal_sram[i].rot_dir_att_db =
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MS(value, AR_PHY_AIC_SRAM_ROT_DIR_ATT_DB);
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cal_sram[i].vga_dir_sign =
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MS(value, AR_PHY_AIC_SRAM_VGA_DIR_SIGN);
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cal_sram[i].com_att_6db =
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MS(value, AR_PHY_AIC_SRAM_COM_ATT_6DB);
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if (cal_sram[i].valid) {
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dir_path_gain_idx = cal_sram[i].rot_dir_att_db +
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com_att_db_table[cal_sram[i].com_att_6db];
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quad_path_gain_idx = cal_sram[i].rot_quad_att_db +
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com_att_db_table[cal_sram[i].com_att_6db];
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dir_path_sign = (cal_sram[i].vga_dir_sign) ? 1 : -1;
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quad_path_sign = (cal_sram[i].vga_quad_sign) ? 1 : -1;
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aic_sram[i].dir_path_gain_lin = dir_path_sign *
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aic_lin_table[dir_path_gain_idx];
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aic_sram[i].quad_path_gain_lin = quad_path_sign *
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aic_lin_table[quad_path_gain_idx];
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}
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}
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for (i = 0; i < ATH_AIC_MAX_BT_CHANNEL; i++) {
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int16_t start_idx, end_idx;
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if (cal_sram[i].valid)
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continue;
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start_idx = ar9003_aic_find_valid(cal_sram, 0, i);
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end_idx = ar9003_aic_find_valid(cal_sram, 1, i);
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if (start_idx < 0) {
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/* extrapolation */
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start_idx = end_idx;
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end_idx = ar9003_aic_find_valid(cal_sram, 1, start_idx);
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if (end_idx < 0) {
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ret = false;
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break;
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}
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aic_sram[i].dir_path_gain_lin =
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((aic_sram[start_idx].dir_path_gain_lin -
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aic_sram[end_idx].dir_path_gain_lin) *
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(start_idx - i) + ((end_idx - i) >> 1)) /
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(end_idx - i) +
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aic_sram[start_idx].dir_path_gain_lin;
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aic_sram[i].quad_path_gain_lin =
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((aic_sram[start_idx].quad_path_gain_lin -
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aic_sram[end_idx].quad_path_gain_lin) *
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(start_idx - i) + ((end_idx - i) >> 1)) /
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(end_idx - i) +
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aic_sram[start_idx].quad_path_gain_lin;
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}
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if (end_idx < 0) {
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/* extrapolation */
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end_idx = ar9003_aic_find_valid(cal_sram, 0, start_idx);
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if (end_idx < 0) {
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ret = false;
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break;
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}
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aic_sram[i].dir_path_gain_lin =
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((aic_sram[start_idx].dir_path_gain_lin -
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aic_sram[end_idx].dir_path_gain_lin) *
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(i - start_idx) + ((start_idx - end_idx) >> 1)) /
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(start_idx - end_idx) +
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aic_sram[start_idx].dir_path_gain_lin;
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aic_sram[i].quad_path_gain_lin =
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((aic_sram[start_idx].quad_path_gain_lin -
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aic_sram[end_idx].quad_path_gain_lin) *
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(i - start_idx) + ((start_idx - end_idx) >> 1)) /
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(start_idx - end_idx) +
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aic_sram[start_idx].quad_path_gain_lin;
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} else if (start_idx >= 0){
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/* interpolation */
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aic_sram[i].dir_path_gain_lin =
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(((end_idx - i) * aic_sram[start_idx].dir_path_gain_lin) +
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((i - start_idx) * aic_sram[end_idx].dir_path_gain_lin) +
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((end_idx - start_idx) >> 1)) /
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(end_idx - start_idx);
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aic_sram[i].quad_path_gain_lin =
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(((end_idx - i) * aic_sram[start_idx].quad_path_gain_lin) +
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((i - start_idx) * aic_sram[end_idx].quad_path_gain_lin) +
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((end_idx - start_idx) >> 1))/
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(end_idx - start_idx);
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}
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}
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/* From dir/quad_path_gain_lin to sram. */
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i = ar9003_aic_find_valid(cal_sram, 1, 0);
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if (i < 0) {
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i = 0;
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ret = false;
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}
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fixed_com_att_db = com_att_db_table[cal_sram[i].com_att_6db];
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for (i = 0; i < ATH_AIC_MAX_BT_CHANNEL; i++) {
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int16_t rot_dir_path_att_db, rot_quad_path_att_db;
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aic_sram[i].sram.vga_dir_sign =
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(aic_sram[i].dir_path_gain_lin >= 0) ? 1 : 0;
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aic_sram[i].sram.vga_quad_sign=
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(aic_sram[i].quad_path_gain_lin >= 0) ? 1 : 0;
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rot_dir_path_att_db =
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ar9003_aic_find_index(0, abs(aic_sram[i].dir_path_gain_lin)) -
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fixed_com_att_db;
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rot_quad_path_att_db =
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ar9003_aic_find_index(0, abs(aic_sram[i].quad_path_gain_lin)) -
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fixed_com_att_db;
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aic_sram[i].sram.com_att_6db =
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ar9003_aic_find_index(1, fixed_com_att_db);
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aic_sram[i].sram.valid = 1;
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aic_sram[i].sram.rot_dir_att_db =
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min(max(rot_dir_path_att_db,
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(int16_t)ATH_AIC_MIN_ROT_DIR_ATT_DB),
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ATH_AIC_MAX_ROT_DIR_ATT_DB);
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aic_sram[i].sram.rot_quad_att_db =
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min(max(rot_quad_path_att_db,
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(int16_t)ATH_AIC_MIN_ROT_QUAD_ATT_DB),
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ATH_AIC_MAX_ROT_QUAD_ATT_DB);
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}
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for (i = 0; i < ATH_AIC_MAX_BT_CHANNEL; i++) {
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aic->aic_sram[i] = (SM(aic_sram[i].sram.vga_dir_sign,
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AR_PHY_AIC_SRAM_VGA_DIR_SIGN) |
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SM(aic_sram[i].sram.vga_quad_sign,
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AR_PHY_AIC_SRAM_VGA_QUAD_SIGN) |
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SM(aic_sram[i].sram.com_att_6db,
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AR_PHY_AIC_SRAM_COM_ATT_6DB) |
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SM(aic_sram[i].sram.valid,
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AR_PHY_AIC_SRAM_VALID) |
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SM(aic_sram[i].sram.rot_dir_att_db,
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AR_PHY_AIC_SRAM_ROT_DIR_ATT_DB) |
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SM(aic_sram[i].sram.rot_quad_att_db,
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AR_PHY_AIC_SRAM_ROT_QUAD_ATT_DB));
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}
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return ret;
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}
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static void ar9003_aic_cal_done(struct ath_hw *ah)
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{
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struct ath9k_hw_aic *aic = &ah->btcoex_hw.aic;
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/* Disable AIC reference signal in BT modem. */
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REG_WRITE(ah, ATH_AIC_BT_JUPITER_CTRL,
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(REG_READ(ah, ATH_AIC_BT_JUPITER_CTRL) &
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~ATH_AIC_BT_AIC_ENABLE));
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if (ar9003_aic_cal_post_process(ah))
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aic->aic_cal_state = AIC_CAL_STATE_DONE;
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else
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aic->aic_cal_state = AIC_CAL_STATE_ERROR;
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}
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static u8 ar9003_aic_cal_continue(struct ath_hw *ah, bool cal_once)
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