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pinctrl: at91: Add set_multiple GPIO chip feature 

This adds the callback for set_multiple.

As this controller has a separate set and clear register, we
can't write directly to PIO_ODSR as this would required a cached
variable and would race with at91_gpio_set.

So build masks for the PIO_SODR and PIO_CODR registers and
write them together.

Signed-off-by: Alexander Stein <alexanders83@web.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
hifive-unleashed-5.1
Alexander Stein 2015-04-02 11:55:49 +02:00 committed by Linus Walleij
parent 5ebe6afaf0
commit 1893b2cfad
1 changed files with 16 additions and 0 deletions
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16
drivers/pinctrl/pinctrl-at91.c
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@ -1326,6 +1326,21 @@ static void at91_gpio_set(struct gpio_chip *chip, unsigned offset,
writel_relaxed(mask, pio + (val ? PIO_SODR : PIO_CODR));
}
static void at91_gpio_set_multiple(struct gpio_chip *chip,
unsigned long *mask, unsigned long *bits)
{
struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip);
void __iomem *pio = at91_gpio->regbase;
#define BITS_MASK(bits) (((bits) == 32) ? ~0U : (BIT(bits) - 1))
/* Mask additionally to ngpio as not all GPIO controllers have 32 pins */
uint32_t set_mask = (*mask & *bits) & BITS_MASK(chip->ngpio);
uint32_t clear_mask = (*mask & ~(*bits)) & BITS_MASK(chip->ngpio);
writel_relaxed(set_mask, pio + PIO_SODR);
writel_relaxed(clear_mask, pio + PIO_CODR);
}
static int at91_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
int val)
{
@ -1685,6 +1700,7 @@ static struct gpio_chip at91_gpio_template = {
.get = at91_gpio_get,
.direction_output = at91_gpio_direction_output,
.set = at91_gpio_set,
.set_multiple = at91_gpio_set_multiple,
.dbg_show = at91_gpio_dbg_show,
.can_sleep = false,
.ngpio = MAX_NB_GPIO_PER_BANK,