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arm: dts: mt2701: Add usb2 device nodes 

Add musb nodes and usb2 phy nodes for MT2701

Signed-off-by: Min Guo <min.guo@mediatek.com>
Link: https://lore.kernel.org/r/20191211015446.11477-3-min.guo@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
alistair/sunxi64-5.8
Min Guo 2019-12-11 09:54:42 +08:00 committed by Matthias Brugger
parent 795240b52e
commit 189881af81
2 changed files with 54 additions and 0 deletions
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21
arch/arm/boot/dts/mt2701-evb.dts
View File

@ -6,6 +6,7 @@
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "mt2701.dtsi"
/ {
@ -61,6 +62,15 @@
>;
default-brightness-level = <9>;
};
usb_vbus: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "usb_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&pio 45 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&auxadc {
@ -230,3 +240,14 @@
&uart0 {
status = "okay";
};
&usb2 {
status = "okay";
usb-role-switch;
connector{
compatible = "gpio-usb-b-connector", "usb-b-connector";
type = "micro";
id-gpios = <&pio 44 GPIO_ACTIVE_HIGH>;
vbus-supply = <&usb_vbus>;
};
};

33
arch/arm/boot/dts/mt2701.dtsi
View File

@ -671,6 +671,39 @@
};
};
usb2: usb@11200000 {
compatible = "mediatek,mt2701-musb",
"mediatek,mtk-musb";
reg = <0 0x11200000 0 0x1000>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "mc";
phys = <&u2port2 PHY_TYPE_USB2>;
dr_mode = "otg";
clocks = <&pericfg CLK_PERI_USB0>,
<&pericfg CLK_PERI_USB0_MCU>,
<&pericfg CLK_PERI_USB_SLV>;
clock-names = "main","mcu","univpll";
power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
status = "disabled";
};
u2phy0: usb-phy@11210000 {
compatible = "mediatek,generic-tphy-v1";
reg = <0 0x11210000 0 0x0800>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
status = "okay";
u2port2: usb-phy@1a1c4800 {
reg = <0 0x11210800 0 0x0100>;
clocks = <&topckgen CLK_TOP_USB_PHY48M>;
clock-names = "ref";
#phy-cells = <1>;
status = "okay";
};
};
ethsys: syscon@1b000000 {
compatible = "mediatek,mt2701-ethsys", "syscon";
reg = <0 0x1b000000 0 0x1000>;