pinctrl: samsung: Decouple direction setting from pinctrl
This patch makes the pinctrl-samsung driver configure GPIO direction on its own, without using the pinctrl_gpio_direction_*() "helpers". The rationale behind this change is as follows: - pinctrl-samsung does not need translation from GPIO namespace to pinctrl namespace to handle GPIO operations - GPIO chip and offset therein are enough to calculate necessary offsets and bit masks in constant time, - the pinctrl_gpio_direction_*() functions do not do anything useful other than translating the pin into pinctrl namespace and calling the .gpio_set_direction() from pinmux_ops of the controller, - the undesirable side effect of using those helpers is losing the ability to change GPIO direction in atomic context, because they explicitly use a mutex for synchronization, Results of this patch are: - fixed warnings about scheduling while atomic in code that needs to set GPIO direction in atomic context (e.g. interrupt handler), - reduced overhead of bitbanging drivers that use gpio_direction_*(), e.g. i2c-gpio. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -333,57 +333,12 @@ static int samsung_pinmux_enable(struct pinctrl_dev *pctldev, unsigned selector,
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return 0;
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return 0;
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}
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}
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/*
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* The calls to gpio_direction_output() and gpio_direction_input()
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* leads to this function call (via the pinctrl_gpio_direction_{input|output}()
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* function called from the gpiolib interface).
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*/
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static int samsung_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *range, unsigned offset, bool input)
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{
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struct samsung_pin_bank_type *type;
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struct samsung_pin_bank *bank;
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struct samsung_pinctrl_drv_data *drvdata;
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void __iomem *reg;
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u32 data, pin_offset, mask, shift;
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unsigned long flags;
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bank = gc_to_pin_bank(range->gc);
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type = bank->type;
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drvdata = pinctrl_dev_get_drvdata(pctldev);
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pin_offset = offset - bank->pin_base;
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reg = drvdata->virt_base + bank->pctl_offset +
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type->reg_offset[PINCFG_TYPE_FUNC];
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mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
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shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC];
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if (shift >= 32) {
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/* Some banks have two config registers */
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shift -= 32;
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reg += 4;
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}
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spin_lock_irqsave(&bank->slock, flags);
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data = readl(reg);
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data &= ~(mask << shift);
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if (!input)
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data |= FUNC_OUTPUT << shift;
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writel(data, reg);
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spin_unlock_irqrestore(&bank->slock, flags);
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return 0;
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}
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/* list of pinmux callbacks for the pinmux vertical in pinctrl core */
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/* list of pinmux callbacks for the pinmux vertical in pinctrl core */
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static const struct pinmux_ops samsung_pinmux_ops = {
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static const struct pinmux_ops samsung_pinmux_ops = {
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.get_functions_count = samsung_get_functions_count,
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.get_functions_count = samsung_get_functions_count,
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.get_function_name = samsung_pinmux_get_fname,
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.get_function_name = samsung_pinmux_get_fname,
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.get_function_groups = samsung_pinmux_get_groups,
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.get_function_groups = samsung_pinmux_get_groups,
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.enable = samsung_pinmux_enable,
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.enable = samsung_pinmux_enable,
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.gpio_set_direction = samsung_pinmux_gpio_set_direction,
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};
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};
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/* set or get the pin config settings for a specified pin */
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/* set or get the pin config settings for a specified pin */
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@ -532,25 +487,59 @@ static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset)
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}
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}
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/*
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/*
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* gpiolib gpio_direction_input callback function. The setting of the pin
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* The calls to gpio_direction_output() and gpio_direction_input()
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* mux function as 'gpio input' will be handled by the pinctrl susbsystem
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* leads to this function call.
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* interface.
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*/
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*/
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static int samsung_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
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static int samsung_gpio_set_direction(struct gpio_chip *gc,
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unsigned offset, bool input)
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{
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{
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return pinctrl_gpio_direction_input(gc->base + offset);
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struct samsung_pin_bank_type *type;
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struct samsung_pin_bank *bank;
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struct samsung_pinctrl_drv_data *drvdata;
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void __iomem *reg;
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u32 data, mask, shift;
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unsigned long flags;
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bank = gc_to_pin_bank(gc);
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type = bank->type;
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drvdata = bank->drvdata;
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reg = drvdata->virt_base + bank->pctl_offset +
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type->reg_offset[PINCFG_TYPE_FUNC];
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mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
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shift = offset * type->fld_width[PINCFG_TYPE_FUNC];
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if (shift >= 32) {
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/* Some banks have two config registers */
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shift -= 32;
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reg += 4;
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}
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spin_lock_irqsave(&bank->slock, flags);
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data = readl(reg);
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data &= ~(mask << shift);
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if (!input)
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data |= FUNC_OUTPUT << shift;
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writel(data, reg);
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spin_unlock_irqrestore(&bank->slock, flags);
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return 0;
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}
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}
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/*
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/* gpiolib gpio_direction_input callback function. */
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* gpiolib gpio_direction_output callback function. The setting of the pin
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static int samsung_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
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* mux function as 'gpio output' will be handled by the pinctrl susbsystem
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{
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* interface.
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return samsung_gpio_set_direction(gc, offset, true);
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*/
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}
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/* gpiolib gpio_direction_output callback function. */
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static int samsung_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
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static int samsung_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
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int value)
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int value)
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{
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{
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samsung_gpio_set(gc, offset, value);
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samsung_gpio_set(gc, offset, value);
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return pinctrl_gpio_direction_output(gc->base + offset);
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return samsung_gpio_set_direction(gc, offset, false);
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}
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}
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/*
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/*
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