staging: ti dspbridge: move mmufault to deh
Signed-off-by: Felipe Contreras <felipe.contreras@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Felipe Contreras
Greg Kroah-Hartman
parent
61a5b769d3
commit
1961c9ccd5
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@ -5,7 +5,7 @@ libservices = services/sync.o services/cfg.o \
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services/ntfy.o services/services.o
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libcore = core/chnl_sm.o core/msg_sm.o core/io_sm.o core/tiomap3430.o \
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core/tiomap3430_pwr.o core/tiomap_io.o \
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core/mmu_fault.o core/ue_deh.o core/wdt.o core/dsp-clock.o
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core/ue_deh.o core/wdt.o core/dsp-clock.o
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libpmgr = pmgr/chnl.o pmgr/io.o pmgr/msg.o pmgr/cod.o pmgr/dev.o pmgr/dspapi.o \
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pmgr/dmm.o pmgr/cmm.o pmgr/dbll.o
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librmgr = rmgr/dbdcd.o rmgr/disp.o rmgr/drv.o rmgr/mgr.o rmgr/node.o \
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@ -1,98 +0,0 @@
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/*
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* mmu_fault.c
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*
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* DSP-BIOS Bridge driver support functions for TI OMAP processors.
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*
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* Implements DSP MMU fault handling functions.
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*
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* Copyright (C) 2005-2006 Texas Instruments, Inc.
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*
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* This package is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
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* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
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*/
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/* ----------------------------------- DSP/BIOS Bridge */
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#include <dspbridge/std.h>
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#include <dspbridge/dbdefs.h>
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/* ----------------------------------- Trace & Debug */
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#include <dspbridge/host_os.h>
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#include <dspbridge/dbc.h>
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/* ----------------------------------- OS Adaptation Layer */
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#include <dspbridge/drv.h>
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/* ----------------------------------- Link Driver */
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#include <dspbridge/dspdeh.h>
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/* ------------------------------------ Hardware Abstraction Layer */
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#include <hw_defs.h>
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#include <hw_mmu.h>
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/* ----------------------------------- This */
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#include "_deh.h"
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#include <dspbridge/cfg.h>
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#include "_tiomap.h"
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#include "mmu_fault.h"
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/*
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* ======== mmu_fault_dpc ========
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* Deferred procedure call to handle DSP MMU fault.
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*/
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void mmu_fault_dpc(IN unsigned long pRefData)
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{
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struct deh_mgr *hdeh_mgr = (struct deh_mgr *)pRefData;
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if (!hdeh_mgr)
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return;
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bridge_deh_notify(hdeh_mgr, DSP_MMUFAULT, 0L);
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}
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/*
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* ======== mmu_fault_isr ========
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* ISR to be triggered by a DSP MMU fault interrupt.
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*/
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irqreturn_t mmu_fault_isr(int irq, IN void *pRefData)
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{
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struct deh_mgr *deh_mgr_obj = pRefData;
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struct cfg_hostres *resources;
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u32 dmmu_event_mask;
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if (!deh_mgr_obj)
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return IRQ_HANDLED;
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resources = deh_mgr_obj->hbridge_context->resources;
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if (!resources) {
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dev_dbg(bridge, "%s: Failed to get Host Resources\n",
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__func__);
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return IRQ_HANDLED;
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}
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hw_mmu_event_status(resources->dw_dmmu_base, &dmmu_event_mask);
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if (dmmu_event_mask == HW_MMU_TRANSLATION_FAULT) {
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hw_mmu_fault_addr_read(resources->dw_dmmu_base, &deh_mgr_obj->fault_addr);
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dev_info(bridge, "%s: status=0x%x, fault_addr=0x%x\n", __func__,
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dmmu_event_mask, deh_mgr_obj->fault_addr);
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/*
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* Schedule a DPC directly. In the future, it may be
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* necessary to check if DSP MMU fault is intended for
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* Bridge.
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*/
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tasklet_schedule(&deh_mgr_obj->dpc_tasklet);
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/* Disable the MMU events, else once we clear it will
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* start to raise INTs again */
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hw_mmu_event_disable(resources->dw_dmmu_base,
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HW_MMU_TRANSLATION_FAULT);
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} else {
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hw_mmu_event_disable(resources->dw_dmmu_base,
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HW_MMU_ALL_INTERRUPTS);
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}
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return IRQ_HANDLED;
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}
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@ -1,34 +0,0 @@
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/*
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* mmu_fault.h
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*
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* DSP-BIOS Bridge driver support functions for TI OMAP processors.
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*
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* Defines DSP MMU fault handling functions.
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*
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* Copyright (C) 2005-2006 Texas Instruments, Inc.
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*
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* This package is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
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* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
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*/
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#ifndef MMU_FAULT_
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#define MMU_FAULT_
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/*
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* ======== mmu_fault_dpc ========
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* Deferred procedure call to handle DSP MMU fault.
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*/
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void mmu_fault_dpc(IN unsigned long pRefData);
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/*
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* ======== mmu_fault_isr ========
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* ISR to be triggered by a DSP MMU fault interrupt.
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*/
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irqreturn_t mmu_fault_isr(int irq, IN void *pRefData);
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#endif /* MMU_FAULT_ */
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@ -45,13 +45,61 @@
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#include <hw_mmu.h>
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/* ----------------------------------- This */
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#include "mmu_fault.h"
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#include "_tiomap.h"
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#include "_deh.h"
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#include "_tiomap_pwr.h"
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#include <dspbridge/io_sm.h>
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static void mmu_fault_dpc(unsigned long data)
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{
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struct deh_mgr *hdeh_mgr = (void *)data;
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if (!hdeh_mgr)
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return;
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bridge_deh_notify(hdeh_mgr, DSP_MMUFAULT, 0);
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}
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static irqreturn_t mmu_fault_isr(int irq, void *data)
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{
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struct deh_mgr *deh_mgr_obj = data;
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struct cfg_hostres *resources;
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u32 dmmu_event_mask;
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if (!deh_mgr_obj)
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return IRQ_HANDLED;
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resources = deh_mgr_obj->hbridge_context->resources;
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if (!resources) {
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dev_dbg(bridge, "%s: Failed to get Host Resources\n",
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__func__);
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return IRQ_HANDLED;
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}
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hw_mmu_event_status(resources->dw_dmmu_base, &dmmu_event_mask);
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if (dmmu_event_mask == HW_MMU_TRANSLATION_FAULT) {
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hw_mmu_fault_addr_read(resources->dw_dmmu_base, &deh_mgr_obj->fault_addr);
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dev_info(bridge, "%s: status=0x%x, fault_addr=0x%x\n", __func__,
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dmmu_event_mask, deh_mgr_obj->fault_addr);
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/*
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* Schedule a DPC directly. In the future, it may be
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* necessary to check if DSP MMU fault is intended for
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* Bridge.
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*/
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tasklet_schedule(&deh_mgr_obj->dpc_tasklet);
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/* Disable the MMU events, else once we clear it will
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* start to raise INTs again */
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hw_mmu_event_disable(resources->dw_dmmu_base,
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HW_MMU_TRANSLATION_FAULT);
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} else {
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hw_mmu_event_disable(resources->dw_dmmu_base,
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HW_MMU_ALL_INTERRUPTS);
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}
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return IRQ_HANDLED;
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}
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int bridge_deh_create(struct deh_mgr **ret_deh_mgr,
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struct dev_object *hdev_obj)
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{
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