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staging: et131x: clear up use of TRUEPHY defines

There are a large number of TRUEPHY defines in the driver, all of which
are unused or unnecessary. Remove / replace these.

As this results in et1310_phy_access_mii_bit() only being used for
reading bits, also change it's name to et1310_phy_read_mii_bit().

Signed-off-by: Mark Einon <mark.einon@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
hifive-unleashed-5.1
Mark Einon 2013-12-05 22:37:43 +00:00 committed by Greg Kroah-Hartman
parent 6ff6280f4e
commit 19d857de4a
2 changed files with 11 additions and 74 deletions

View File

@ -1494,10 +1494,10 @@ static int et131x_mii_write(struct et131x_adapter *adapter, u8 reg, u16 value)
return status;
}
/* Still used from _mac for BIT_READ */
static void et1310_phy_access_mii_bit(struct et131x_adapter *adapter,
u16 action, u16 regnum, u16 bitnum,
u8 *value)
static void et1310_phy_read_mii_bit(struct et131x_adapter *adapter,
u16 regnum,
u16 bitnum,
u8 *value)
{
u16 reg;
u16 mask = 1 << bitnum;
@ -1505,22 +1505,7 @@ static void et1310_phy_access_mii_bit(struct et131x_adapter *adapter,
/* Read the requested register */
et131x_mii_read(adapter, regnum, &reg);
switch (action) {
case TRUEPHY_BIT_READ:
*value = (reg & mask) >> bitnum;
break;
case TRUEPHY_BIT_SET:
et131x_mii_write(adapter, regnum, reg | mask);
break;
case TRUEPHY_BIT_CLEAR:
et131x_mii_write(adapter, regnum, reg & ~mask);
break;
default:
break;
}
*value = (reg & mask) >> bitnum;
}
static void et1310_config_flow_control(struct et131x_adapter *adapter)
@ -1532,27 +1517,19 @@ static void et1310_config_flow_control(struct et131x_adapter *adapter)
} else {
char remote_pause, remote_async_pause;
et1310_phy_access_mii_bit(adapter,
TRUEPHY_BIT_READ, 5, 10, &remote_pause);
et1310_phy_access_mii_bit(adapter,
TRUEPHY_BIT_READ, 5, 11,
&remote_async_pause);
et1310_phy_read_mii_bit(adapter, 5, 10, &remote_pause);
et1310_phy_read_mii_bit(adapter, 5, 11, &remote_async_pause);
if ((remote_pause == TRUEPHY_BIT_SET) &&
(remote_async_pause == TRUEPHY_BIT_SET)) {
if (remote_pause && remote_async_pause) {
adapter->flowcontrol = adapter->wanted_flow;
} else if ((remote_pause == TRUEPHY_BIT_SET) &&
(remote_async_pause == TRUEPHY_BIT_CLEAR)) {
} else if (remote_pause && !remote_async_pause) {
if (adapter->wanted_flow == FLOW_BOTH)
adapter->flowcontrol = FLOW_BOTH;
else
adapter->flowcontrol = FLOW_NONE;
} else if ((remote_pause == TRUEPHY_BIT_CLEAR) &&
(remote_async_pause == TRUEPHY_BIT_CLEAR)) {
} else if (!remote_pause && !remote_async_pause) {
adapter->flowcontrol = FLOW_NONE;
} else {/* if (remote_pause == TRUEPHY_CLEAR_BIT &&
* remote_async_pause == TRUEPHY_SET_BIT)
*/
} else {
if (adapter->wanted_flow == FLOW_BOTH)
adapter->flowcontrol = FLOW_RXONLY;
else

View File

@ -1668,43 +1668,3 @@ struct address_map {
#define LED_100TX_SHIFT 4
/* MI Register 29 - 31: Reserved Reg(0x1D - 0x1E) */
/* Defines for PHY access routines */
/* Define bit operation flags */
#define TRUEPHY_BIT_CLEAR 0
#define TRUEPHY_BIT_SET 1
#define TRUEPHY_BIT_READ 2
/* Define read/write operation flags */
#ifndef TRUEPHY_READ
#define TRUEPHY_READ 0
#define TRUEPHY_WRITE 1
#define TRUEPHY_MASK 2
#endif
/* Define master/slave configuration values */
#define TRUEPHY_CFG_SLAVE 0
#define TRUEPHY_CFG_MASTER 1
/* Define MDI/MDI-X settings */
#define TRUEPHY_MDI 0
#define TRUEPHY_MDIX 1
#define TRUEPHY_AUTO_MDI_MDIX 2
/* Define 10Base-T link polarities */
#define TRUEPHY_POLARITY_NORMAL 0
#define TRUEPHY_POLARITY_INVERTED 1
/* Define auto-negotiation results */
#define TRUEPHY_ANEG_NOT_COMPLETE 0
#define TRUEPHY_ANEG_COMPLETE 1
#define TRUEPHY_ANEG_DISABLED 2
/* Define duplex advertisement flags */
#define TRUEPHY_ADV_DUPLEX_NONE 0x00
#define TRUEPHY_ADV_DUPLEX_FULL 0x01
#define TRUEPHY_ADV_DUPLEX_HALF 0x02
#define TRUEPHY_ADV_DUPLEX_BOTH \
(TRUEPHY_ADV_DUPLEX_FULL | TRUEPHY_ADV_DUPLEX_HALF)