ionic: Add basic lif support
The LIF is the Logical Interface, which represents the external connections. The NIC can multiplex many LIFs to a single port, but in most setups, LIF0 is the primary control for the port. Signed-off-by: Shannon Nelson <snelson@pensando.io> Signed-off-by: David S. Miller <davem@davemloft.net>alistair/sunxi64-5.4-dsi
Shannon Nelson
David S. Miller
parent
04436595c4
commit
1a58e19646
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@ -4,4 +4,4 @@
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obj-$(CONFIG_IONIC) := ionic.o
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ionic-y := ionic_main.o ionic_bus_pci.o ionic_devlink.o ionic_dev.o \
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ionic_debugfs.o
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ionic_debugfs.o ionic_lif.o
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@ -32,6 +32,13 @@ struct ionic {
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struct ionic_dev_bar bars[IONIC_BARS_MAX];
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unsigned int num_bars;
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struct ionic_identity ident;
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struct list_head lifs;
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unsigned int nnqs_per_lif;
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unsigned int neqs_per_lif;
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unsigned int ntxqs_per_lif;
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unsigned int nrxqs_per_lif;
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DECLARE_BITMAP(lifbits, IONIC_LIFS_MAX);
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unsigned int nintrs;
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};
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int ionic_dev_cmd_wait(struct ionic *ionic, unsigned long max_wait);
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@ -5,6 +5,8 @@
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#define _IONIC_BUS_H_
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const char *ionic_bus_info(struct ionic *ionic);
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int ionic_bus_alloc_irq_vectors(struct ionic *ionic, unsigned int nintrs);
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void ionic_bus_free_irq_vectors(struct ionic *ionic);
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int ionic_bus_register_driver(void);
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void ionic_bus_unregister_driver(void);
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@ -8,6 +8,7 @@
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#include "ionic.h"
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#include "ionic_bus.h"
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#include "ionic_lif.h"
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#include "ionic_debugfs.h"
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/* Supported devices */
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@ -23,6 +24,17 @@ const char *ionic_bus_info(struct ionic *ionic)
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return pci_name(ionic->pdev);
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}
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int ionic_bus_alloc_irq_vectors(struct ionic *ionic, unsigned int nintrs)
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{
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return pci_alloc_irq_vectors(ionic->pdev, nintrs, nintrs,
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PCI_IRQ_MSIX);
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}
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void ionic_bus_free_irq_vectors(struct ionic *ionic)
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{
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pci_free_irq_vectors(ionic->pdev);
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}
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static int ionic_map_bars(struct ionic *ionic)
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{
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struct pci_dev *pdev = ionic->pdev;
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@ -151,12 +163,44 @@ static int ionic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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goto err_out_reset;
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}
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/* Configure LIFs */
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err = ionic_lif_identify(ionic, IONIC_LIF_TYPE_CLASSIC,
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&ionic->ident.lif);
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if (err) {
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dev_err(dev, "Cannot identify LIFs: %d, aborting\n", err);
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goto err_out_port_reset;
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}
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err = ionic_lifs_size(ionic);
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if (err) {
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dev_err(dev, "Cannot size LIFs: %d, aborting\n", err);
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goto err_out_port_reset;
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}
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err = ionic_lifs_alloc(ionic);
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if (err) {
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dev_err(dev, "Cannot allocate LIFs: %d, aborting\n", err);
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goto err_out_free_irqs;
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}
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err = ionic_lifs_init(ionic);
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if (err) {
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dev_err(dev, "Cannot init LIFs: %d, aborting\n", err);
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goto err_out_free_lifs;
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}
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err = ionic_devlink_register(ionic);
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if (err)
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dev_err(dev, "Cannot register devlink: %d\n", err);
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return 0;
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err_out_free_lifs:
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ionic_lifs_free(ionic);
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err_out_free_irqs:
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ionic_bus_free_irq_vectors(ionic);
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err_out_port_reset:
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ionic_port_reset(ionic);
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err_out_reset:
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ionic_reset(ionic);
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err_out_teardown:
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@ -185,6 +229,9 @@ static void ionic_remove(struct pci_dev *pdev)
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return;
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ionic_devlink_unregister(ionic);
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ionic_lifs_deinit(ionic);
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ionic_lifs_free(ionic);
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ionic_bus_free_irq_vectors(ionic);
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ionic_port_reset(ionic);
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ionic_reset(ionic);
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ionic_dev_teardown(ionic);
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@ -1,10 +1,12 @@
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright(c) 2017 - 2019 Pensando Systems, Inc */
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#include <linux/pci.h>
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#include <linux/netdevice.h>
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#include "ionic.h"
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#include "ionic_bus.h"
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#include "ionic_lif.h"
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#include "ionic_debugfs.h"
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#ifdef CONFIG_DEBUG_FS
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@ -58,4 +60,38 @@ void ionic_debugfs_add_ident(struct ionic *ionic)
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ionic, &identity_fops) ? 0 : -EOPNOTSUPP;
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}
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void ionic_debugfs_add_sizes(struct ionic *ionic)
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{
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debugfs_create_u32("nlifs", 0400, ionic->dentry,
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(u32 *)&ionic->ident.dev.nlifs);
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debugfs_create_u32("nintrs", 0400, ionic->dentry, &ionic->nintrs);
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debugfs_create_u32("ntxqs_per_lif", 0400, ionic->dentry,
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(u32 *)&ionic->ident.lif.eth.config.queue_count[IONIC_QTYPE_TXQ]);
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debugfs_create_u32("nrxqs_per_lif", 0400, ionic->dentry,
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(u32 *)&ionic->ident.lif.eth.config.queue_count[IONIC_QTYPE_RXQ]);
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}
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static int netdev_show(struct seq_file *seq, void *v)
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{
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struct net_device *netdev = seq->private;
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seq_printf(seq, "%s\n", netdev->name);
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return 0;
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}
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DEFINE_SHOW_ATTRIBUTE(netdev);
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void ionic_debugfs_add_lif(struct ionic_lif *lif)
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{
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lif->dentry = debugfs_create_dir(lif->name, lif->ionic->dentry);
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debugfs_create_file("netdev", 0400, lif->dentry,
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lif->netdev, &netdev_fops);
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}
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void ionic_debugfs_del_lif(struct ionic_lif *lif)
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{
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debugfs_remove_recursive(lif->dentry);
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lif->dentry = NULL;
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}
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#endif
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@ -13,12 +13,18 @@ void ionic_debugfs_destroy(void);
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void ionic_debugfs_add_dev(struct ionic *ionic);
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void ionic_debugfs_del_dev(struct ionic *ionic);
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void ionic_debugfs_add_ident(struct ionic *ionic);
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void ionic_debugfs_add_sizes(struct ionic *ionic);
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void ionic_debugfs_add_lif(struct ionic_lif *lif);
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void ionic_debugfs_del_lif(struct ionic_lif *lif);
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#else
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static inline void ionic_debugfs_create(void) { }
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static inline void ionic_debugfs_destroy(void) { }
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static inline void ionic_debugfs_add_dev(struct ionic *ionic) { }
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static inline void ionic_debugfs_del_dev(struct ionic *ionic) { }
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static inline void ionic_debugfs_add_ident(struct ionic *ionic) { }
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static inline void ionic_debugfs_add_sizes(struct ionic *ionic) { }
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static inline void ionic_debugfs_add_lif(struct ionic_lif *lif) { }
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static inline void ionic_debugfs_del_lif(struct ionic_lif *lif) { }
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#endif
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#endif /* _IONIC_DEBUGFS_H_ */
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@ -226,3 +226,37 @@ void ionic_dev_cmd_port_pause(struct ionic_dev *idev, u8 pause_type)
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ionic_dev_cmd_go(idev, &cmd);
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}
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/* LIF commands */
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void ionic_dev_cmd_lif_identify(struct ionic_dev *idev, u8 type, u8 ver)
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{
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union ionic_dev_cmd cmd = {
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.lif_identify.opcode = IONIC_CMD_LIF_IDENTIFY,
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.lif_identify.type = type,
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.lif_identify.ver = ver,
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};
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ionic_dev_cmd_go(idev, &cmd);
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}
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void ionic_dev_cmd_lif_init(struct ionic_dev *idev, u16 lif_index,
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dma_addr_t info_pa)
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{
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union ionic_dev_cmd cmd = {
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.lif_init.opcode = IONIC_CMD_LIF_INIT,
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.lif_init.index = cpu_to_le16(lif_index),
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.lif_init.info_pa = cpu_to_le64(info_pa),
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};
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ionic_dev_cmd_go(idev, &cmd);
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}
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void ionic_dev_cmd_lif_reset(struct ionic_dev *idev, u16 lif_index)
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{
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union ionic_dev_cmd cmd = {
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.lif_init.opcode = IONIC_CMD_LIF_RESET,
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.lif_init.index = cpu_to_le16(lif_index),
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};
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ionic_dev_cmd_go(idev, &cmd);
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}
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@ -10,6 +10,8 @@
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#include "ionic_if.h"
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#include "ionic_regs.h"
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#define IONIC_LIFS_MAX 1024
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struct ionic_dev_bar {
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void __iomem *vaddr;
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phys_addr_t bus_addr;
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@ -148,4 +150,9 @@ void ionic_dev_cmd_port_autoneg(struct ionic_dev *idev, u8 an_enable);
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void ionic_dev_cmd_port_fec(struct ionic_dev *idev, u8 fec_type);
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void ionic_dev_cmd_port_pause(struct ionic_dev *idev, u8 pause_type);
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void ionic_dev_cmd_lif_identify(struct ionic_dev *idev, u8 type, u8 ver);
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void ionic_dev_cmd_lif_init(struct ionic_dev *idev, u16 lif_index,
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dma_addr_t addr);
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void ionic_dev_cmd_lif_reset(struct ionic_dev *idev, u16 lif_index);
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#endif /* _IONIC_DEV_H_ */
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@ -0,0 +1,291 @@
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright(c) 2017 - 2019 Pensando Systems, Inc */
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/interrupt.h>
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#include <linux/pci.h>
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#include <linux/cpumask.h>
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#include "ionic.h"
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#include "ionic_bus.h"
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#include "ionic_lif.h"
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#include "ionic_debugfs.h"
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static struct ionic_lif *ionic_lif_alloc(struct ionic *ionic, unsigned int index)
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{
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struct device *dev = ionic->dev;
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struct net_device *netdev;
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struct ionic_lif *lif;
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int err;
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netdev = alloc_etherdev_mqs(sizeof(*lif),
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ionic->ntxqs_per_lif, ionic->ntxqs_per_lif);
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if (!netdev) {
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dev_err(dev, "Cannot allocate netdev, aborting\n");
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return ERR_PTR(-ENOMEM);
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}
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SET_NETDEV_DEV(netdev, dev);
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lif = netdev_priv(netdev);
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lif->netdev = netdev;
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lif->neqs = ionic->neqs_per_lif;
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lif->nxqs = ionic->ntxqs_per_lif;
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lif->ionic = ionic;
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lif->index = index;
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snprintf(lif->name, sizeof(lif->name), "lif%u", index);
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/* allocate lif info */
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lif->info_sz = ALIGN(sizeof(*lif->info), PAGE_SIZE);
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lif->info = dma_alloc_coherent(dev, lif->info_sz,
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&lif->info_pa, GFP_KERNEL);
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if (!lif->info) {
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dev_err(dev, "Failed to allocate lif info, aborting\n");
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err = -ENOMEM;
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goto err_out_free_netdev;
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}
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list_add_tail(&lif->list, &ionic->lifs);
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return lif;
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err_out_free_netdev:
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free_netdev(lif->netdev);
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lif = NULL;
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return ERR_PTR(err);
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}
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int ionic_lifs_alloc(struct ionic *ionic)
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{
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struct ionic_lif *lif;
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INIT_LIST_HEAD(&ionic->lifs);
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/* only build the first lif, others are for later features */
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set_bit(0, ionic->lifbits);
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lif = ionic_lif_alloc(ionic, 0);
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return PTR_ERR_OR_ZERO(lif);
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}
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static void ionic_lif_reset(struct ionic_lif *lif)
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{
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struct ionic_dev *idev = &lif->ionic->idev;
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mutex_lock(&lif->ionic->dev_cmd_lock);
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ionic_dev_cmd_lif_reset(idev, lif->index);
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ionic_dev_cmd_wait(lif->ionic, DEVCMD_TIMEOUT);
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mutex_unlock(&lif->ionic->dev_cmd_lock);
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}
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static void ionic_lif_free(struct ionic_lif *lif)
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{
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struct device *dev = lif->ionic->dev;
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ionic_lif_reset(lif);
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/* free lif info */
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dma_free_coherent(dev, lif->info_sz, lif->info, lif->info_pa);
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lif->info = NULL;
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lif->info_pa = 0;
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/* free netdev & lif */
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ionic_debugfs_del_lif(lif);
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list_del(&lif->list);
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free_netdev(lif->netdev);
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}
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void ionic_lifs_free(struct ionic *ionic)
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{
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struct list_head *cur, *tmp;
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struct ionic_lif *lif;
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list_for_each_safe(cur, tmp, &ionic->lifs) {
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lif = list_entry(cur, struct ionic_lif, list);
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ionic_lif_free(lif);
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}
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}
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static void ionic_lif_deinit(struct ionic_lif *lif)
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{
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if (!test_bit(IONIC_LIF_INITED, lif->state))
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return;
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clear_bit(IONIC_LIF_INITED, lif->state);
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ionic_lif_reset(lif);
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}
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void ionic_lifs_deinit(struct ionic *ionic)
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{
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struct list_head *cur, *tmp;
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struct ionic_lif *lif;
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list_for_each_safe(cur, tmp, &ionic->lifs) {
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lif = list_entry(cur, struct ionic_lif, list);
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ionic_lif_deinit(lif);
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}
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}
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static int ionic_lif_init(struct ionic_lif *lif)
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{
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struct ionic_dev *idev = &lif->ionic->idev;
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struct ionic_lif_init_comp comp;
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int err;
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ionic_debugfs_add_lif(lif);
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mutex_lock(&lif->ionic->dev_cmd_lock);
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ionic_dev_cmd_lif_init(idev, lif->index, lif->info_pa);
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err = ionic_dev_cmd_wait(lif->ionic, DEVCMD_TIMEOUT);
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ionic_dev_cmd_comp(idev, (union ionic_dev_cmd_comp *)&comp);
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mutex_unlock(&lif->ionic->dev_cmd_lock);
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if (err)
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return err;
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lif->hw_index = le16_to_cpu(comp.hw_index);
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set_bit(IONIC_LIF_INITED, lif->state);
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return 0;
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}
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int ionic_lifs_init(struct ionic *ionic)
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{
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struct list_head *cur, *tmp;
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struct ionic_lif *lif;
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int err;
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list_for_each_safe(cur, tmp, &ionic->lifs) {
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lif = list_entry(cur, struct ionic_lif, list);
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err = ionic_lif_init(lif);
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if (err)
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return err;
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}
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return 0;
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}
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int ionic_lif_identify(struct ionic *ionic, u8 lif_type,
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union ionic_lif_identity *lid)
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{
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struct ionic_dev *idev = &ionic->idev;
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size_t sz;
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int err;
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sz = min(sizeof(*lid), sizeof(idev->dev_cmd_regs->data));
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mutex_lock(&ionic->dev_cmd_lock);
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ionic_dev_cmd_lif_identify(idev, lif_type, IONIC_IDENTITY_VERSION_1);
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err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
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memcpy_fromio(lid, &idev->dev_cmd_regs->data, sz);
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mutex_unlock(&ionic->dev_cmd_lock);
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if (err)
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return (err);
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dev_dbg(ionic->dev, "capabilities 0x%llx\n",
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le64_to_cpu(lid->capabilities));
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dev_dbg(ionic->dev, "eth.max_ucast_filters %d\n",
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le32_to_cpu(lid->eth.max_ucast_filters));
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dev_dbg(ionic->dev, "eth.max_mcast_filters %d\n",
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le32_to_cpu(lid->eth.max_mcast_filters));
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dev_dbg(ionic->dev, "eth.features 0x%llx\n",
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le64_to_cpu(lid->eth.config.features));
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dev_dbg(ionic->dev, "eth.queue_count[IONIC_QTYPE_ADMINQ] %d\n",
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le32_to_cpu(lid->eth.config.queue_count[IONIC_QTYPE_ADMINQ]));
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dev_dbg(ionic->dev, "eth.queue_count[IONIC_QTYPE_NOTIFYQ] %d\n",
|
||||
le32_to_cpu(lid->eth.config.queue_count[IONIC_QTYPE_NOTIFYQ]));
|
||||
dev_dbg(ionic->dev, "eth.queue_count[IONIC_QTYPE_RXQ] %d\n",
|
||||
le32_to_cpu(lid->eth.config.queue_count[IONIC_QTYPE_RXQ]));
|
||||
dev_dbg(ionic->dev, "eth.queue_count[IONIC_QTYPE_TXQ] %d\n",
|
||||
le32_to_cpu(lid->eth.config.queue_count[IONIC_QTYPE_TXQ]));
|
||||
dev_dbg(ionic->dev, "eth.config.name %s\n", lid->eth.config.name);
|
||||
dev_dbg(ionic->dev, "eth.config.mac %pM\n", lid->eth.config.mac);
|
||||
dev_dbg(ionic->dev, "eth.config.mtu %d\n",
|
||||
le32_to_cpu(lid->eth.config.mtu));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ionic_lifs_size(struct ionic *ionic)
|
||||
{
|
||||
struct ionic_identity *ident = &ionic->ident;
|
||||
unsigned int nintrs, dev_nintrs;
|
||||
union ionic_lif_config *lc;
|
||||
unsigned int ntxqs_per_lif;
|
||||
unsigned int nrxqs_per_lif;
|
||||
unsigned int neqs_per_lif;
|
||||
unsigned int nnqs_per_lif;
|
||||
unsigned int nxqs, neqs;
|
||||
unsigned int min_intrs;
|
||||
int err;
|
||||
|
||||
lc = &ident->lif.eth.config;
|
||||
dev_nintrs = le32_to_cpu(ident->dev.nintrs);
|
||||
neqs_per_lif = le32_to_cpu(ident->lif.rdma.eq_qtype.qid_count);
|
||||
nnqs_per_lif = le32_to_cpu(lc->queue_count[IONIC_QTYPE_NOTIFYQ]);
|
||||
ntxqs_per_lif = le32_to_cpu(lc->queue_count[IONIC_QTYPE_TXQ]);
|
||||
nrxqs_per_lif = le32_to_cpu(lc->queue_count[IONIC_QTYPE_RXQ]);
|
||||
|
||||
nxqs = min(ntxqs_per_lif, nrxqs_per_lif);
|
||||
nxqs = min(nxqs, num_online_cpus());
|
||||
neqs = min(neqs_per_lif, num_online_cpus());
|
||||
|
||||
try_again:
|
||||
/* interrupt usage:
|
||||
* 1 for master lif adminq/notifyq
|
||||
* 1 for each CPU for master lif TxRx queue pairs
|
||||
* whatever's left is for RDMA queues
|
||||
*/
|
||||
nintrs = 1 + nxqs + neqs;
|
||||
min_intrs = 2; /* adminq + 1 TxRx queue pair */
|
||||
|
||||
if (nintrs > dev_nintrs)
|
||||
goto try_fewer;
|
||||
|
||||
err = ionic_bus_alloc_irq_vectors(ionic, nintrs);
|
||||
if (err < 0 && err != -ENOSPC) {
|
||||
dev_err(ionic->dev, "Can't get intrs from OS: %d\n", err);
|
||||
return err;
|
||||
}
|
||||
if (err == -ENOSPC)
|
||||
goto try_fewer;
|
||||
|
||||
if (err != nintrs) {
|
||||
ionic_bus_free_irq_vectors(ionic);
|
||||
goto try_fewer;
|
||||
}
|
||||
|
||||
ionic->nnqs_per_lif = nnqs_per_lif;
|
||||
ionic->neqs_per_lif = neqs;
|
||||
ionic->ntxqs_per_lif = nxqs;
|
||||
ionic->nrxqs_per_lif = nxqs;
|
||||
ionic->nintrs = nintrs;
|
||||
|
||||
ionic_debugfs_add_sizes(ionic);
|
||||
|
||||
return 0;
|
||||
|
||||
try_fewer:
|
||||
if (nnqs_per_lif > 1) {
|
||||
nnqs_per_lif >>= 1;
|
||||
goto try_again;
|
||||
}
|
||||
if (neqs > 1) {
|
||||
neqs >>= 1;
|
||||
goto try_again;
|
||||
}
|
||||
if (nxqs > 1) {
|
||||
nxqs >>= 1;
|
||||
goto try_again;
|
||||
}
|
||||
dev_err(ionic->dev, "Can't get minimum %d intrs from OS\n", min_intrs);
|
||||
return -ENOSPC;
|
||||
}
|
||||
|
|
@ -0,0 +1,45 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/* Copyright(c) 2017 - 2019 Pensando Systems, Inc */
|
||||
|
||||
#ifndef _IONIC_LIF_H_
|
||||
#define _IONIC_LIF_H_
|
||||
|
||||
#include <linux/pci.h>
|
||||
|
||||
enum ionic_lif_state_flags {
|
||||
IONIC_LIF_INITED,
|
||||
|
||||
/* leave this as last */
|
||||
IONIC_LIF_STATE_SIZE
|
||||
};
|
||||
|
||||
#define IONIC_LIF_NAME_MAX_SZ 32
|
||||
struct ionic_lif {
|
||||
char name[IONIC_LIF_NAME_MAX_SZ];
|
||||
struct list_head list;
|
||||
struct net_device *netdev;
|
||||
DECLARE_BITMAP(state, IONIC_LIF_STATE_SIZE);
|
||||
struct ionic *ionic;
|
||||
bool registered;
|
||||
unsigned int index;
|
||||
unsigned int hw_index;
|
||||
unsigned int neqs;
|
||||
unsigned int nxqs;
|
||||
|
||||
struct ionic_lif_info *info;
|
||||
dma_addr_t info_pa;
|
||||
u32 info_sz;
|
||||
|
||||
struct dentry *dentry;
|
||||
u32 flags;
|
||||
};
|
||||
|
||||
int ionic_lifs_alloc(struct ionic *ionic);
|
||||
void ionic_lifs_free(struct ionic *ionic);
|
||||
void ionic_lifs_deinit(struct ionic *ionic);
|
||||
int ionic_lifs_init(struct ionic *ionic);
|
||||
int ionic_lif_identify(struct ionic *ionic, u8 lif_type,
|
||||
union ionic_lif_identity *lif_ident);
|
||||
int ionic_lifs_size(struct ionic *ionic);
|
||||
|
||||
#endif /* _IONIC_LIF_H_ */
|
||||
|
|
@ -8,6 +8,7 @@
|
|||
|
||||
#include "ionic.h"
|
||||
#include "ionic_bus.h"
|
||||
#include "ionic_lif.h"
|
||||
#include "ionic_debugfs.h"
|
||||
|
||||
MODULE_DESCRIPTION(IONIC_DRV_DESCRIPTION);
|
||||
|
|
|
|||
Loading…
Reference in New Issue