arm64: use both ZONE_DMA and ZONE_DMA32
So far all arm64 devices have supported 32 bit DMA masks for their peripherals. This is not true anymore for the Raspberry Pi 4 as most of it's peripherals can only address the first GB of memory on a total of up to 4 GB. This goes against ZONE_DMA32's intent, as it's expected for ZONE_DMA32 to be addressable with a 32 bit mask. So it was decided to re-introduce ZONE_DMA in arm64. ZONE_DMA will contain the lower 1G of memory, which is currently the memory area addressable by any peripheral on an arm64 device. ZONE_DMA32 will contain the rest of the 32 bit addressable memory. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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@ -266,6 +266,10 @@ config GENERIC_CSUM
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config GENERIC_CALIBRATE_DELAY
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def_bool y
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config ZONE_DMA
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bool "Support DMA zone" if EXPERT
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default y
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config ZONE_DMA32
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bool "Support DMA32 zone" if EXPERT
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default y
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@ -38,4 +38,6 @@ extern int pfn_valid(unsigned long);
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#include <asm-generic/getorder.h>
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#define ARCH_ZONE_DMA_BITS 30
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#endif
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@ -56,6 +56,13 @@ EXPORT_SYMBOL(physvirt_offset);
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struct page *vmemmap __ro_after_init;
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EXPORT_SYMBOL(vmemmap);
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/*
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* We create both ZONE_DMA and ZONE_DMA32. ZONE_DMA covers the first 1G of
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* memory as some devices, namely the Raspberry Pi 4, have peripherals with
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* this limited view of the memory. ZONE_DMA32 will cover the rest of the 32
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* bit addressable memory area.
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*/
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phys_addr_t arm64_dma_phys_limit __ro_after_init;
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phys_addr_t arm64_dma32_phys_limit __ro_after_init;
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#ifdef CONFIG_KEXEC_CORE
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@ -169,15 +176,16 @@ static void __init reserve_elfcorehdr(void)
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{
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}
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#endif /* CONFIG_CRASH_DUMP */
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/*
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* Return the maximum physical address for ZONE_DMA32 (DMA_BIT_MASK(32)). It
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* currently assumes that for memory starting above 4G, 32-bit devices will
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* use a DMA offset.
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* Return the maximum physical address for a zone with a given address size
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* limit. It currently assumes that for memory starting above 4G, 32-bit
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* devices will use a DMA offset.
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*/
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static phys_addr_t __init max_zone_dma32_phys(void)
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static phys_addr_t __init max_zone_phys(unsigned int zone_bits)
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{
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phys_addr_t offset = memblock_start_of_DRAM() & GENMASK_ULL(63, 32);
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return min(offset + (1ULL << 32), memblock_end_of_DRAM());
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phys_addr_t offset = memblock_start_of_DRAM() & GENMASK_ULL(63, zone_bits);
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return min(offset + (1ULL << zone_bits), memblock_end_of_DRAM());
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}
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#ifdef CONFIG_NUMA
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@ -186,6 +194,9 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max)
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{
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unsigned long max_zone_pfns[MAX_NR_ZONES] = {0};
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#ifdef CONFIG_ZONE_DMA
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max_zone_pfns[ZONE_DMA] = PFN_DOWN(arm64_dma_phys_limit);
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#endif
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#ifdef CONFIG_ZONE_DMA32
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max_zone_pfns[ZONE_DMA32] = PFN_DOWN(arm64_dma32_phys_limit);
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#endif
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@ -201,13 +212,18 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max)
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struct memblock_region *reg;
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unsigned long zone_size[MAX_NR_ZONES], zhole_size[MAX_NR_ZONES];
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unsigned long max_dma32 = min;
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unsigned long max_dma = min;
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memset(zone_size, 0, sizeof(zone_size));
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/* 4GB maximum for 32-bit only capable devices */
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#ifdef CONFIG_ZONE_DMA
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max_dma = PFN_DOWN(arm64_dma_phys_limit);
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zone_size[ZONE_DMA] = max_dma - min;
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max_dma32 = max_dma;
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#endif
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#ifdef CONFIG_ZONE_DMA32
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max_dma32 = PFN_DOWN(arm64_dma32_phys_limit);
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zone_size[ZONE_DMA32] = max_dma32 - min;
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zone_size[ZONE_DMA32] = max_dma32 - max_dma;
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#endif
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zone_size[ZONE_NORMAL] = max - max_dma32;
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@ -219,11 +235,17 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max)
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if (start >= max)
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continue;
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#ifdef CONFIG_ZONE_DMA
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if (start < max_dma) {
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unsigned long dma_end = min_not_zero(end, max_dma);
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zhole_size[ZONE_DMA] -= dma_end - start;
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}
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#endif
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#ifdef CONFIG_ZONE_DMA32
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if (start < max_dma32) {
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unsigned long dma_end = min(end, max_dma32);
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zhole_size[ZONE_DMA32] -= dma_end - start;
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unsigned long dma32_end = min(end, max_dma32);
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unsigned long dma32_start = max(start, max_dma);
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zhole_size[ZONE_DMA32] -= dma32_end - dma32_start;
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}
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#endif
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if (end > max_dma32) {
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@ -418,9 +440,11 @@ void __init arm64_memblock_init(void)
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early_init_fdt_scan_reserved_mem();
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/* 4GB maximum for 32-bit only capable devices */
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if (IS_ENABLED(CONFIG_ZONE_DMA))
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arm64_dma_phys_limit = max_zone_phys(ARCH_ZONE_DMA_BITS);
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if (IS_ENABLED(CONFIG_ZONE_DMA32))
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arm64_dma32_phys_limit = max_zone_dma32_phys();
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arm64_dma32_phys_limit = max_zone_phys(32);
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else
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arm64_dma32_phys_limit = PHYS_MASK + 1;
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@ -430,7 +454,7 @@ void __init arm64_memblock_init(void)
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high_memory = __va(memblock_end_of_DRAM() - 1) + 1;
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dma_contiguous_reserve(arm64_dma32_phys_limit);
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dma_contiguous_reserve(arm64_dma_phys_limit ? : arm64_dma32_phys_limit);
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}
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void __init bootmem_init(void)
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@ -534,7 +558,7 @@ static void __init free_unused_memmap(void)
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void __init mem_init(void)
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{
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if (swiotlb_force == SWIOTLB_FORCE ||
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max_pfn > (arm64_dma32_phys_limit >> PAGE_SHIFT))
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max_pfn > PFN_DOWN(arm64_dma_phys_limit ? : arm64_dma32_phys_limit))
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swiotlb_init(1);
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else
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swiotlb_force = SWIOTLB_NO_FORCE;
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