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drm/amd/display: DCN2.x Do not program DPPCLK if same value 

[WHY]
Programming DPPCLK to the same value currently set may cause
underflow while playing video in certain conditions.

[HOW]
Only program DPPCLK if clock is not the same as the
previous value programmed.

Signed-off-by: Sung Lee <sung.lee@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
alistair/sensors
Sung Lee 2020-02-04 15:49:54 -05:00 committed by Alex Deucher
parent 9a14e81649
commit 1b53e73323
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
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@ -117,7 +117,7 @@ void dcn20_update_clocks_update_dpp_dto(struct clk_mgr_internal *clk_mgr,
prev_dppclk_khz = clk_mgr->base.ctx->dc->current_state->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz;
if (safe_to_lower || prev_dppclk_khz < dppclk_khz) {
if ((prev_dppclk_khz > dppclk_khz && safe_to_lower) || prev_dppclk_khz < dppclk_khz) {
clk_mgr->dccg->funcs->update_dpp_dto(
clk_mgr->dccg, dpp_inst, dppclk_khz);
}