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pinctrl: sh-pfc: r8a77970: Rename IOCTRLx registers 

The R-Car Gen3 HardWare Manual Errata for Rev. 1.00 (Jul 2, 2018)
renamed the various miscellaneous I/O control registers (IOCTRLx) on
R-Car V3M, to reflect better their actual purposes, and matching other
SoCs.

Update the code to match this.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
hifive-unleashed-5.2
Geert Uytterhoeven 2019-02-18 10:35:39 +01:00
parent 9e98c678c2
commit 1c5c110175
1 changed files with 8 additions and 8 deletions
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16
drivers/pinctrl/sh-pfc/pfc-r8a77970.c
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@ -2406,15 +2406,15 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
};
enum ioctrl_regs {
IOCTRL30,
IOCTRL31,
IOCTRL32,
POCCTRL0,
POCCTRL1,
POCCTRL2,
};
static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
[IOCTRL30] = { 0xe6060380 },
[IOCTRL31] = { 0xe6060384 },
[IOCTRL32] = { 0xe6060388 },
[POCCTRL0] = { 0xe6060380 },
[POCCTRL1] = { 0xe6060384 },
[POCCTRL2] = { 0xe6060388 },
{ /* sentinel */ },
};
@ -2423,13 +2423,13 @@ static int r8a77970_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin,
{
int bit = pin & 0x1f;
*pocctrl = pinmux_ioctrl_regs[IOCTRL30].reg;
*pocctrl = pinmux_ioctrl_regs[POCCTRL0].reg;
if (pin >= RCAR_GP_PIN(0, 0) && pin <= RCAR_GP_PIN(0, 21))
return bit;
if (pin >= RCAR_GP_PIN(2, 0) && pin <= RCAR_GP_PIN(2, 9))
return bit + 22;
*pocctrl = pinmux_ioctrl_regs[IOCTRL31].reg;
*pocctrl = pinmux_ioctrl_regs[POCCTRL1].reg;
if (pin >= RCAR_GP_PIN(2, 10) && pin <= RCAR_GP_PIN(2, 16))
return bit - 10;
if (pin >= RCAR_GP_PIN(3, 0) && pin <= RCAR_GP_PIN(3, 16))