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EDAC/amd64: Use cached data when checking for ECC 

...now that the data is available earlier.

Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: "linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>
Cc: James Morse <james.morse@arm.com>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: Robert Richter <rrichter@marvell.com>
Cc: Tony Luck <tony.luck@intel.com>
Link: https://lkml.kernel.org/r/20191106012448.243970-5-Yazen.Ghannam@amd.com
alistair/sunxi64-5.5-dsi
Yazen Ghannam 2019-10-22 20:35:12 +00:00 committed by Borislav Petkov
parent 5e4c55276a
commit 1c9b08bac5
1 changed files with 8 additions and 12 deletions
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20
drivers/edac/amd64_edac.c
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@ -3202,31 +3202,27 @@ static const char *ecc_msg =
"'ecc_enable_override'.\n"
" (Note that use of the override may cause unknown side effects.)\n";
static bool ecc_enabled(struct pci_dev *F3, u16 nid)
static bool ecc_enabled(struct amd64_pvt *pvt)
{
u16 nid = pvt->mc_node_id;
bool nb_mce_en = false;
u8 ecc_en = 0, i;
u32 value;
if (boot_cpu_data.x86 >= 0x17) {
u8 umc_en_mask = 0, ecc_en_mask = 0;
struct amd64_umc *umc;
for_each_umc(i) {
u32 base = get_umc_base(i);
umc = &pvt->umc[i];
/* Only check enabled UMCs. */
if (amd_smn_read(nid, base + UMCCH_SDP_CTRL, &value))
continue;
if (!(value & UMC_SDP_INIT))
if (!(umc->sdp_ctrl & UMC_SDP_INIT))
continue;
umc_en_mask |= BIT(i);
if (amd_smn_read(nid, base + UMCCH_UMC_CAP_HI, &value))
continue;
if (value & UMC_ECC_ENABLED)
if (umc->umc_cap_hi & UMC_ECC_ENABLED)
ecc_en_mask |= BIT(i);
}
@ -3239,7 +3235,7 @@ static bool ecc_enabled(struct pci_dev *F3, u16 nid)
/* Assume UMC MCA banks are enabled. */
nb_mce_en = true;
} else {
amd64_read_pci_cfg(F3, NBCFG, &value);
amd64_read_pci_cfg(pvt->F3, NBCFG, &value);
ecc_en = !!(value & NBCFG_ECC_ENABLE);
@ -3524,7 +3520,7 @@ static int probe_one_instance(unsigned int nid)
if (ret < 0)
goto err_enable;
if (!ecc_enabled(F3, nid)) {
if (!ecc_enabled(pvt)) {
ret = 0;
if (!ecc_enable_override)