ARM: PL08x: move cctl increment and protection setup to prep_slave_sg
We don't need to initialize the cctl increment and protection values in the runtime_config method - we have all the inforamtion to setup these values in prep_slave_sg(). Move their initialization there. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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@ -1148,12 +1148,10 @@ static void dma_set_runtime_config(struct dma_chan *chan,
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plchan->runtime_direction = config->direction;
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plchan->runtime_direction = config->direction;
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if (config->direction == DMA_TO_DEVICE) {
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if (config->direction == DMA_TO_DEVICE) {
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plchan->runtime_addr = config->dst_addr;
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plchan->runtime_addr = config->dst_addr;
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cctl |= PL080_CONTROL_SRC_INCR;
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addr_width = config->dst_addr_width;
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addr_width = config->dst_addr_width;
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maxburst = config->dst_maxburst;
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maxburst = config->dst_maxburst;
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} else if (config->direction == DMA_FROM_DEVICE) {
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} else if (config->direction == DMA_FROM_DEVICE) {
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plchan->runtime_addr = config->src_addr;
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plchan->runtime_addr = config->src_addr;
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cctl |= PL080_CONTROL_DST_INCR;
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addr_width = config->src_addr_width;
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addr_width = config->src_addr_width;
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maxburst = config->src_maxburst;
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maxburst = config->src_maxburst;
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} else {
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} else {
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@ -1197,10 +1195,6 @@ static void dma_set_runtime_config(struct dma_chan *chan,
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cctl |= burst_sizes[i].reg;
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cctl |= burst_sizes[i].reg;
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}
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}
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/* Access the cell in privileged mode, non-bufferable, non-cacheable */
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cctl &= ~PL080_CONTROL_PROT_MASK;
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cctl |= PL080_CONTROL_PROT_SYS;
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/* Modify the default channel data to fit PrimeCell request */
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/* Modify the default channel data to fit PrimeCell request */
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cd->cctl = cctl;
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cd->cctl = cctl;
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@ -1405,10 +1399,16 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
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* channel target address dynamically at runtime.
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* channel target address dynamically at runtime.
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*/
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*/
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txd->direction = direction;
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txd->direction = direction;
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txd->cctl = plchan->cd->cctl;
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txd->cctl = plchan->cd->cctl &
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~(PL080_CONTROL_SRC_INCR | PL080_CONTROL_DST_INCR |
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PL080_CONTROL_PROT_MASK);
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/* Access the cell in privileged mode, non-bufferable, non-cacheable */
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txd->cctl |= PL080_CONTROL_PROT_SYS;
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if (direction == DMA_TO_DEVICE) {
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if (direction == DMA_TO_DEVICE) {
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txd->ccfg |= PL080_FLOW_MEM2PER << PL080_CONFIG_FLOW_CONTROL_SHIFT;
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txd->ccfg |= PL080_FLOW_MEM2PER << PL080_CONFIG_FLOW_CONTROL_SHIFT;
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txd->cctl |= PL080_CONTROL_SRC_INCR;
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txd->srcbus.addr = sgl->dma_address;
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txd->srcbus.addr = sgl->dma_address;
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if (plchan->runtime_addr)
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if (plchan->runtime_addr)
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txd->dstbus.addr = plchan->runtime_addr;
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txd->dstbus.addr = plchan->runtime_addr;
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@ -1416,6 +1416,7 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
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txd->dstbus.addr = plchan->cd->addr;
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txd->dstbus.addr = plchan->cd->addr;
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} else if (direction == DMA_FROM_DEVICE) {
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} else if (direction == DMA_FROM_DEVICE) {
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txd->ccfg |= PL080_FLOW_PER2MEM << PL080_CONFIG_FLOW_CONTROL_SHIFT;
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txd->ccfg |= PL080_FLOW_PER2MEM << PL080_CONFIG_FLOW_CONTROL_SHIFT;
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txd->cctl |= PL080_CONTROL_DST_INCR;
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if (plchan->runtime_addr)
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if (plchan->runtime_addr)
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txd->srcbus.addr = plchan->runtime_addr;
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txd->srcbus.addr = plchan->runtime_addr;
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else
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else
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