bcache: implement PI controller for writeback rate
bcache uses a control system to attempt to keep the amount of dirty data in cache at a user-configured level, while not responding excessively to transients and variations in write rate. Previously, the system was a PD controller; but the output from it was integrated, turning the Proportional term into an Integral term, and turning the Derivative term into a crude Proportional term. Performance of the controller has been uneven in production, and it has tended to respond slowly, oscillate, and overshoot. This patch set replaces the current control system with an explicit PI controller and tuning that should be correct for most hardware. By default, it attempts to write at a rate that would retire 1/40th of the current excess blocks per second. An integral term in turn works to remove steady state errors. IMO, this yields benefits in simplicity (removing weighted average filtering, etc) and system performance. Another small change is a tunable parameter is introduced to allow the user to specify a minimum rate at which dirty blocks are retired. There is a slight difference from earlier versions of the patch in integral handling to prevent excessive negative integral windup. Signed-off-by: Michael Lyle <mlyle@lyle.org> Reviewed-by: Coly Li <colyli@suse.de> Signed-off-by: Jens Axboe <axboe@kernel.dk>hifive-unleashed-5.1
Michael Lyle
Jens Axboe
parent
5fa89fb9a8
commit
1d316e6583
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@ -265,9 +265,6 @@ struct bcache_device {
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atomic_t *stripe_sectors_dirty;
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unsigned long *full_dirty_stripes;
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unsigned long sectors_dirty_last;
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long sectors_dirty_derivative;
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struct bio_set *bio_split;
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unsigned data_csum:1;
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@ -362,12 +359,14 @@ struct cached_dev {
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uint64_t writeback_rate_target;
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int64_t writeback_rate_proportional;
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int64_t writeback_rate_derivative;
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int64_t writeback_rate_integral;
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int64_t writeback_rate_integral_scaled;
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int64_t writeback_rate_change;
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unsigned writeback_rate_update_seconds;
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unsigned writeback_rate_d_term;
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unsigned writeback_rate_i_term_inverse;
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unsigned writeback_rate_p_term_inverse;
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unsigned writeback_rate_minimum;
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};
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enum alloc_reserve {
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@ -81,8 +81,9 @@ rw_attribute(writeback_delay);
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rw_attribute(writeback_rate);
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rw_attribute(writeback_rate_update_seconds);
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rw_attribute(writeback_rate_d_term);
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rw_attribute(writeback_rate_i_term_inverse);
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rw_attribute(writeback_rate_p_term_inverse);
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rw_attribute(writeback_rate_minimum);
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read_attribute(writeback_rate_debug);
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read_attribute(stripe_size);
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@ -130,15 +131,16 @@ SHOW(__bch_cached_dev)
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sysfs_hprint(writeback_rate, dc->writeback_rate.rate << 9);
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var_print(writeback_rate_update_seconds);
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var_print(writeback_rate_d_term);
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var_print(writeback_rate_i_term_inverse);
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var_print(writeback_rate_p_term_inverse);
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var_print(writeback_rate_minimum);
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if (attr == &sysfs_writeback_rate_debug) {
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char rate[20];
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char dirty[20];
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char target[20];
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char proportional[20];
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char derivative[20];
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char integral[20];
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char change[20];
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s64 next_io;
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@ -146,7 +148,7 @@ SHOW(__bch_cached_dev)
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bch_hprint(dirty, bcache_dev_sectors_dirty(&dc->disk) << 9);
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bch_hprint(target, dc->writeback_rate_target << 9);
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bch_hprint(proportional,dc->writeback_rate_proportional << 9);
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bch_hprint(derivative, dc->writeback_rate_derivative << 9);
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bch_hprint(integral, dc->writeback_rate_integral_scaled << 9);
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bch_hprint(change, dc->writeback_rate_change << 9);
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next_io = div64_s64(dc->writeback_rate.next - local_clock(),
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@ -157,11 +159,11 @@ SHOW(__bch_cached_dev)
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"dirty:\t\t%s\n"
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"target:\t\t%s\n"
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"proportional:\t%s\n"
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"derivative:\t%s\n"
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"integral:\t%s\n"
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"change:\t\t%s/sec\n"
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"next io:\t%llims\n",
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rate, dirty, target, proportional,
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derivative, change, next_io);
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integral, change, next_io);
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}
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sysfs_hprint(dirty_data,
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@ -213,7 +215,7 @@ STORE(__cached_dev)
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dc->writeback_rate.rate, 1, INT_MAX);
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d_strtoul_nonzero(writeback_rate_update_seconds);
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d_strtoul(writeback_rate_d_term);
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d_strtoul(writeback_rate_i_term_inverse);
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d_strtoul_nonzero(writeback_rate_p_term_inverse);
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d_strtoi_h(sequential_cutoff);
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@ -319,7 +321,7 @@ static struct attribute *bch_cached_dev_files[] = {
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&sysfs_writeback_percent,
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&sysfs_writeback_rate,
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&sysfs_writeback_rate_update_seconds,
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&sysfs_writeback_rate_d_term,
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&sysfs_writeback_rate_i_term_inverse,
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&sysfs_writeback_rate_p_term_inverse,
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&sysfs_writeback_rate_debug,
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&sysfs_dirty_data,
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@ -25,48 +25,62 @@ static void __update_writeback_rate(struct cached_dev *dc)
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bcache_flash_devs_sectors_dirty(c);
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uint64_t cache_dirty_target =
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div_u64(cache_sectors * dc->writeback_percent, 100);
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int64_t target = div64_u64(cache_dirty_target * bdev_sectors(dc->bdev),
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c->cached_dev_sectors);
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/* PD controller */
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/*
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* PI controller:
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* Figures out the amount that should be written per second.
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*
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* First, the error (number of sectors that are dirty beyond our
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* target) is calculated. The error is accumulated (numerically
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* integrated).
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*
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* Then, the proportional value and integral value are scaled
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* based on configured values. These are stored as inverses to
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* avoid fixed point math and to make configuration easy-- e.g.
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* the default value of 40 for writeback_rate_p_term_inverse
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* attempts to write at a rate that would retire all the dirty
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* blocks in 40 seconds.
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*
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* The writeback_rate_i_inverse value of 10000 means that 1/10000th
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* of the error is accumulated in the integral term per second.
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* This acts as a slow, long-term average that is not subject to
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* variations in usage like the p term.
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*/
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int64_t dirty = bcache_dev_sectors_dirty(&dc->disk);
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int64_t derivative = dirty - dc->disk.sectors_dirty_last;
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int64_t proportional = dirty - target;
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int64_t change;
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int64_t error = dirty - target;
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int64_t proportional_scaled =
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div_s64(error, dc->writeback_rate_p_term_inverse);
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int64_t integral_scaled, new_rate;
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dc->disk.sectors_dirty_last = dirty;
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if ((error < 0 && dc->writeback_rate_integral > 0) ||
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(error > 0 && time_before64(local_clock(),
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dc->writeback_rate.next + NSEC_PER_MSEC))) {
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/*
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* Only decrease the integral term if it's more than
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* zero. Only increase the integral term if the device
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* is keeping up. (Don't wind up the integral
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* ineffectively in either case).
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*
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* It's necessary to scale this by
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* writeback_rate_update_seconds to keep the integral
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* term dimensioned properly.
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*/
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dc->writeback_rate_integral += error *
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dc->writeback_rate_update_seconds;
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}
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/* Scale to sectors per second */
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integral_scaled = div_s64(dc->writeback_rate_integral,
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dc->writeback_rate_i_term_inverse);
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proportional *= dc->writeback_rate_update_seconds;
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proportional = div_s64(proportional, dc->writeback_rate_p_term_inverse);
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new_rate = clamp_t(int64_t, (proportional_scaled + integral_scaled),
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dc->writeback_rate_minimum, NSEC_PER_MSEC);
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derivative = div_s64(derivative, dc->writeback_rate_update_seconds);
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derivative = ewma_add(dc->disk.sectors_dirty_derivative, derivative,
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(dc->writeback_rate_d_term /
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dc->writeback_rate_update_seconds) ?: 1, 0);
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derivative *= dc->writeback_rate_d_term;
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derivative = div_s64(derivative, dc->writeback_rate_p_term_inverse);
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change = proportional + derivative;
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/* Don't increase writeback rate if the device isn't keeping up */
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if (change > 0 &&
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time_after64(local_clock(),
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dc->writeback_rate.next + NSEC_PER_MSEC))
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change = 0;
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dc->writeback_rate.rate =
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clamp_t(int64_t, (int64_t) dc->writeback_rate.rate + change,
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1, NSEC_PER_MSEC);
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dc->writeback_rate_proportional = proportional;
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dc->writeback_rate_derivative = derivative;
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dc->writeback_rate_change = change;
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dc->writeback_rate_proportional = proportional_scaled;
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dc->writeback_rate_integral_scaled = integral_scaled;
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dc->writeback_rate_change = new_rate - dc->writeback_rate.rate;
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dc->writeback_rate.rate = new_rate;
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dc->writeback_rate_target = target;
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}
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@ -499,8 +513,6 @@ void bch_sectors_dirty_init(struct bcache_device *d)
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bch_btree_map_keys(&op.op, d->c, &KEY(op.inode, 0, 0),
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sectors_dirty_init_fn, 0);
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d->sectors_dirty_last = bcache_dev_sectors_dirty(d);
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}
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void bch_cached_dev_writeback_init(struct cached_dev *dc)
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@ -514,10 +526,11 @@ void bch_cached_dev_writeback_init(struct cached_dev *dc)
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dc->writeback_percent = 10;
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dc->writeback_delay = 30;
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dc->writeback_rate.rate = 1024;
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dc->writeback_rate_minimum = 1;
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dc->writeback_rate_update_seconds = 5;
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dc->writeback_rate_d_term = 30;
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dc->writeback_rate_p_term_inverse = 6000;
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dc->writeback_rate_p_term_inverse = 40;
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dc->writeback_rate_i_term_inverse = 10000;
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INIT_DELAYED_WORK(&dc->writeback_rate_update, update_writeback_rate);
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}
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