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ARM: i.MX: system.c: Tweak prefetch settings for performance 

Update Prefetch Control Register settings to match that of Freescale's
Linux tree. As the commit e3addf1b773964eac7f797e8538c69481be4279c
states (author Nitin Garg):

"... set Prefetch offset to 15, since it improves memcpy performance by
35%. Don't enable Incr double Linefill enable since it adversely affects
memcpy performance by about 32MB/s and reads by 90MB/s. Tested with 4K
to 16MB sized src and dst aligned buffer..."

Those results are also corroborated by our own testing.

Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
hifive-unleashed-5.1
Andrey Smirnov 2016-06-18 18:09:30 -07:00 committed by Shawn Guo
parent b829037136
commit 1d9e947799
1 changed files with 6 additions and 2 deletions
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8
arch/arm/mach-imx/system.c
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@ -111,8 +111,12 @@ void __init imx_init_l2cache(void)
val = readl_relaxed(l2x0_base + L310_PREFETCH_CTRL);
val |= L310_PREFETCH_CTRL_DBL_LINEFILL |
L310_PREFETCH_CTRL_INSTR_PREFETCH |
L310_PREFETCH_CTRL_DATA_PREFETCH |
L310_PREFETCH_CTRL_DBL_LINEFILL_INCR;
L310_PREFETCH_CTRL_DATA_PREFETCH;
/* Set perfetch offset to improve performance */
val &= ~L310_PREFETCH_CTRL_OFFSET_MASK;
val |= 15;
writel_relaxed(val, l2x0_base + L310_PREFETCH_CTRL);
}