crypto: arm/aes-ce - switch to 4x interleave
When the ARM AES instruction based crypto driver was introduced, there were no known implementations that could benefit from a 4-way interleave, and so a 3-way interleave was used instead. Since we have sufficient space in the SIMD register file, let's switch to a 4-way interleave to align with the 64-bit driver, and to ensure that we can reach optimum performance when running under emulation on high end 64-bit cores. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>alistair/sunxi64-5.4-dsi
Ard Biesheuvel
Herbert Xu
parent
46a22776bc
commit
1dede02bdd
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@ -44,46 +44,56 @@
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veor q0, q0, \key3
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.endm
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.macro enc_dround_3x, key1, key2
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.macro enc_dround_4x, key1, key2
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enc_round q0, \key1
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enc_round q1, \key1
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enc_round q2, \key1
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enc_round q3, \key1
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enc_round q0, \key2
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enc_round q1, \key2
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enc_round q2, \key2
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enc_round q3, \key2
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.endm
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.macro dec_dround_3x, key1, key2
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.macro dec_dround_4x, key1, key2
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dec_round q0, \key1
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dec_round q1, \key1
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dec_round q2, \key1
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dec_round q3, \key1
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dec_round q0, \key2
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dec_round q1, \key2
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dec_round q2, \key2
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dec_round q3, \key2
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.endm
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.macro enc_fround_3x, key1, key2, key3
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.macro enc_fround_4x, key1, key2, key3
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enc_round q0, \key1
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enc_round q1, \key1
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enc_round q2, \key1
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enc_round q3, \key1
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aese.8 q0, \key2
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aese.8 q1, \key2
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aese.8 q2, \key2
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aese.8 q3, \key2
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veor q0, q0, \key3
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veor q1, q1, \key3
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veor q2, q2, \key3
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veor q3, q3, \key3
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.endm
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.macro dec_fround_3x, key1, key2, key3
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.macro dec_fround_4x, key1, key2, key3
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dec_round q0, \key1
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dec_round q1, \key1
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dec_round q2, \key1
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dec_round q3, \key1
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aesd.8 q0, \key2
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aesd.8 q1, \key2
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aesd.8 q2, \key2
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aesd.8 q3, \key2
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veor q0, q0, \key3
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veor q1, q1, \key3
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veor q2, q2, \key3
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veor q3, q3, \key3
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.endm
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.macro do_block, dround, fround
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@ -114,8 +124,9 @@
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* transforms. These should preserve all registers except q0 - q2 and ip
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* Arguments:
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* q0 : first in/output block
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* q1 : second in/output block (_3x version only)
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* q2 : third in/output block (_3x version only)
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* q1 : second in/output block (_4x version only)
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* q2 : third in/output block (_4x version only)
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* q3 : fourth in/output block (_4x version only)
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* q8 : first round key
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* q9 : secound round key
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* q14 : final round key
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@ -136,16 +147,16 @@ aes_decrypt:
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ENDPROC(aes_decrypt)
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.align 6
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aes_encrypt_3x:
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aes_encrypt_4x:
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add ip, r2, #32 @ 3rd round key
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do_block enc_dround_3x, enc_fround_3x
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ENDPROC(aes_encrypt_3x)
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do_block enc_dround_4x, enc_fround_4x
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ENDPROC(aes_encrypt_4x)
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.align 6
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aes_decrypt_3x:
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aes_decrypt_4x:
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add ip, r2, #32 @ 3rd round key
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do_block dec_dround_3x, dec_fround_3x
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ENDPROC(aes_decrypt_3x)
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do_block dec_dround_4x, dec_fround_4x
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ENDPROC(aes_decrypt_4x)
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.macro prepare_key, rk, rounds
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add ip, \rk, \rounds, lsl #4
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@ -163,17 +174,17 @@ ENTRY(ce_aes_ecb_encrypt)
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push {r4, lr}
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ldr r4, [sp, #8]
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prepare_key r2, r3
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.Lecbencloop3x:
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subs r4, r4, #3
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.Lecbencloop4x:
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subs r4, r4, #4
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bmi .Lecbenc1x
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vld1.8 {q0-q1}, [r1]!
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vld1.8 {q2}, [r1]!
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bl aes_encrypt_3x
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vld1.8 {q2-q3}, [r1]!
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bl aes_encrypt_4x
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vst1.8 {q0-q1}, [r0]!
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vst1.8 {q2}, [r0]!
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b .Lecbencloop3x
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vst1.8 {q2-q3}, [r0]!
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b .Lecbencloop4x
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.Lecbenc1x:
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adds r4, r4, #3
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adds r4, r4, #4
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beq .Lecbencout
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.Lecbencloop:
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vld1.8 {q0}, [r1]!
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@ -189,17 +200,17 @@ ENTRY(ce_aes_ecb_decrypt)
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push {r4, lr}
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ldr r4, [sp, #8]
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prepare_key r2, r3
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.Lecbdecloop3x:
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subs r4, r4, #3
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.Lecbdecloop4x:
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subs r4, r4, #4
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bmi .Lecbdec1x
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vld1.8 {q0-q1}, [r1]!
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vld1.8 {q2}, [r1]!
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bl aes_decrypt_3x
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vld1.8 {q2-q3}, [r1]!
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bl aes_decrypt_4x
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vst1.8 {q0-q1}, [r0]!
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vst1.8 {q2}, [r0]!
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b .Lecbdecloop3x
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vst1.8 {q2-q3}, [r0]!
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b .Lecbdecloop4x
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.Lecbdec1x:
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adds r4, r4, #3
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adds r4, r4, #4
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beq .Lecbdecout
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.Lecbdecloop:
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vld1.8 {q0}, [r1]!
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@ -236,38 +247,40 @@ ENDPROC(ce_aes_cbc_encrypt)
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ENTRY(ce_aes_cbc_decrypt)
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push {r4-r6, lr}
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ldrd r4, r5, [sp, #16]
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vld1.8 {q6}, [r5] @ keep iv in q6
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vld1.8 {q15}, [r5] @ keep iv in q15
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prepare_key r2, r3
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.Lcbcdecloop3x:
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subs r4, r4, #3
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.Lcbcdecloop4x:
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subs r4, r4, #4
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bmi .Lcbcdec1x
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vld1.8 {q0-q1}, [r1]!
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vld1.8 {q2}, [r1]!
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vmov q3, q0
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vmov q4, q1
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vmov q5, q2
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bl aes_decrypt_3x
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veor q0, q0, q6
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veor q1, q1, q3
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veor q2, q2, q4
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vmov q6, q5
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vld1.8 {q2-q3}, [r1]!
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vmov q4, q0
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vmov q5, q1
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vmov q6, q2
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vmov q7, q3
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bl aes_decrypt_4x
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veor q0, q0, q15
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veor q1, q1, q4
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veor q2, q2, q5
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veor q3, q3, q6
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vmov q15, q7
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vst1.8 {q0-q1}, [r0]!
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vst1.8 {q2}, [r0]!
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b .Lcbcdecloop3x
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vst1.8 {q2-q3}, [r0]!
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b .Lcbcdecloop4x
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.Lcbcdec1x:
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adds r4, r4, #3
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adds r4, r4, #4
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beq .Lcbcdecout
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vmov q15, q14 @ preserve last round key
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vmov q6, q14 @ preserve last round key
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.Lcbcdecloop:
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vld1.8 {q0}, [r1]! @ get next ct block
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veor q14, q15, q6 @ combine prev ct with last key
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vmov q6, q0
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vmov q15, q0
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bl aes_decrypt
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vst1.8 {q0}, [r0]!
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subs r4, r4, #1
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bne .Lcbcdecloop
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.Lcbcdecout:
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vst1.8 {q6}, [r5] @ keep iv in q6
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vst1.8 {q15}, [r5] @ keep iv in q15
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pop {r4-r6, pc}
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ENDPROC(ce_aes_cbc_decrypt)
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@ -278,46 +291,52 @@ ENDPROC(ce_aes_cbc_decrypt)
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ENTRY(ce_aes_ctr_encrypt)
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push {r4-r6, lr}
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ldrd r4, r5, [sp, #16]
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vld1.8 {q6}, [r5] @ load ctr
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vld1.8 {q7}, [r5] @ load ctr
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prepare_key r2, r3
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vmov r6, s27 @ keep swabbed ctr in r6
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vmov r6, s31 @ keep swabbed ctr in r6
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rev r6, r6
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cmn r6, r4 @ 32 bit overflow?
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bcs .Lctrloop
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.Lctrloop3x:
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subs r4, r4, #3
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.Lctrloop4x:
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subs r4, r4, #4
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bmi .Lctr1x
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add r6, r6, #1
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vmov q0, q6
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vmov q1, q6
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vmov q0, q7
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vmov q1, q7
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rev ip, r6
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add r6, r6, #1
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vmov q2, q6
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vmov q2, q7
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vmov s7, ip
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rev ip, r6
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add r6, r6, #1
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vmov q3, q7
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vmov s11, ip
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vld1.8 {q3-q4}, [r1]!
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vld1.8 {q5}, [r1]!
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bl aes_encrypt_3x
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veor q0, q0, q3
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veor q1, q1, q4
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veor q2, q2, q5
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rev ip, r6
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add r6, r6, #1
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vmov s15, ip
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vld1.8 {q4-q5}, [r1]!
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vld1.8 {q6}, [r1]!
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vld1.8 {q15}, [r1]!
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bl aes_encrypt_4x
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veor q0, q0, q4
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veor q1, q1, q5
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veor q2, q2, q6
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veor q3, q3, q15
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rev ip, r6
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vst1.8 {q0-q1}, [r0]!
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vst1.8 {q2}, [r0]!
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vmov s27, ip
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b .Lctrloop3x
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vst1.8 {q2-q3}, [r0]!
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vmov s31, ip
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b .Lctrloop4x
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.Lctr1x:
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adds r4, r4, #3
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adds r4, r4, #4
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beq .Lctrout
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.Lctrloop:
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vmov q0, q6
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vmov q0, q7
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bl aes_encrypt
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adds r6, r6, #1 @ increment BE ctr
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rev ip, r6
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vmov s27, ip
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vmov s31, ip
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bcs .Lctrcarry
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.Lctrcarrydone:
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@ -329,7 +348,7 @@ ENTRY(ce_aes_ctr_encrypt)
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bne .Lctrloop
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.Lctrout:
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vst1.8 {q6}, [r5] @ return next CTR value
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vst1.8 {q7}, [r5] @ return next CTR value
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pop {r4-r6, pc}
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.Lctrtailblock:
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@ -337,7 +356,7 @@ ENTRY(ce_aes_ctr_encrypt)
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b .Lctrout
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.Lctrcarry:
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.irp sreg, s26, s25, s24
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.irp sreg, s30, s29, s28
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vmov ip, \sreg @ load next word of ctr
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rev ip, ip @ ... to handle the carry
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adds ip, ip, #1
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@ -368,8 +387,8 @@ ENDPROC(ce_aes_ctr_encrypt)
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.quad 1, 0x87
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ce_aes_xts_init:
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vldr d14, .Lxts_mul_x
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vldr d15, .Lxts_mul_x + 8
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vldr d30, .Lxts_mul_x
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vldr d31, .Lxts_mul_x + 8
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ldrd r4, r5, [sp, #16] @ load args
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ldr r6, [sp, #28]
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@ -390,48 +409,51 @@ ENTRY(ce_aes_xts_encrypt)
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bl ce_aes_xts_init @ run shared prologue
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prepare_key r2, r3
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vmov q3, q0
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vmov q4, q0
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teq r6, #0 @ start of a block?
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bne .Lxtsenc3x
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bne .Lxtsenc4x
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.Lxtsencloop3x:
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next_tweak q3, q3, q7, q6
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.Lxtsenc3x:
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subs r4, r4, #3
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.Lxtsencloop4x:
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next_tweak q4, q4, q15, q10
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.Lxtsenc4x:
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subs r4, r4, #4
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bmi .Lxtsenc1x
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vld1.8 {q0-q1}, [r1]! @ get 3 pt blocks
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vld1.8 {q2}, [r1]!
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next_tweak q4, q3, q7, q6
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veor q0, q0, q3
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next_tweak q5, q4, q7, q6
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veor q1, q1, q4
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veor q2, q2, q5
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bl aes_encrypt_3x
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veor q0, q0, q3
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veor q1, q1, q4
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veor q2, q2, q5
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vst1.8 {q0-q1}, [r0]! @ write 3 ct blocks
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vst1.8 {q2}, [r0]!
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vmov q3, q5
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vld1.8 {q0-q1}, [r1]! @ get 4 pt blocks
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vld1.8 {q2-q3}, [r1]!
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next_tweak q5, q4, q15, q10
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veor q0, q0, q4
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next_tweak q6, q5, q15, q10
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veor q1, q1, q5
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next_tweak q7, q6, q15, q10
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veor q2, q2, q6
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veor q3, q3, q7
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bl aes_encrypt_4x
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veor q0, q0, q4
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veor q1, q1, q5
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veor q2, q2, q6
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veor q3, q3, q7
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vst1.8 {q0-q1}, [r0]! @ write 4 ct blocks
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vst1.8 {q2-q3}, [r0]!
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vmov q4, q7
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teq r4, #0
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beq .Lxtsencout
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b .Lxtsencloop3x
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b .Lxtsencloop4x
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.Lxtsenc1x:
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adds r4, r4, #3
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adds r4, r4, #4
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beq .Lxtsencout
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.Lxtsencloop:
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vld1.8 {q0}, [r1]!
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veor q0, q0, q3
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veor q0, q0, q4
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bl aes_encrypt
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veor q0, q0, q3
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veor q0, q0, q4
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vst1.8 {q0}, [r0]!
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subs r4, r4, #1
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beq .Lxtsencout
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next_tweak q3, q3, q7, q6
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next_tweak q4, q4, q15, q6
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b .Lxtsencloop
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.Lxtsencout:
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vst1.8 {q3}, [r5]
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vst1.8 {q4}, [r5]
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pop {r4-r6, pc}
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ENDPROC(ce_aes_xts_encrypt)
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@ -441,49 +463,52 @@ ENTRY(ce_aes_xts_decrypt)
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bl ce_aes_xts_init @ run shared prologue
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prepare_key r2, r3
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vmov q3, q0
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vmov q4, q0
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teq r6, #0 @ start of a block?
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bne .Lxtsdec3x
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bne .Lxtsdec4x
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.Lxtsdecloop3x:
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next_tweak q3, q3, q7, q6
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.Lxtsdec3x:
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subs r4, r4, #3
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.Lxtsdecloop4x:
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next_tweak q4, q4, q15, q10
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.Lxtsdec4x:
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subs r4, r4, #4
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bmi .Lxtsdec1x
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vld1.8 {q0-q1}, [r1]! @ get 3 ct blocks
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vld1.8 {q2}, [r1]!
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next_tweak q4, q3, q7, q6
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veor q0, q0, q3
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next_tweak q5, q4, q7, q6
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veor q1, q1, q4
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veor q2, q2, q5
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bl aes_decrypt_3x
|
||||
veor q0, q0, q3
|
||||
veor q1, q1, q4
|
||||
veor q2, q2, q5
|
||||
vst1.8 {q0-q1}, [r0]! @ write 3 pt blocks
|
||||
vst1.8 {q2}, [r0]!
|
||||
vmov q3, q5
|
||||
vld1.8 {q0-q1}, [r1]! @ get 4 ct blocks
|
||||
vld1.8 {q2-q3}, [r1]!
|
||||
next_tweak q5, q4, q15, q10
|
||||
veor q0, q0, q4
|
||||
next_tweak q6, q5, q15, q10
|
||||
veor q1, q1, q5
|
||||
next_tweak q7, q6, q15, q10
|
||||
veor q2, q2, q6
|
||||
veor q3, q3, q7
|
||||
bl aes_decrypt_4x
|
||||
veor q0, q0, q4
|
||||
veor q1, q1, q5
|
||||
veor q2, q2, q6
|
||||
veor q3, q3, q7
|
||||
vst1.8 {q0-q1}, [r0]! @ write 4 pt blocks
|
||||
vst1.8 {q2-q3}, [r0]!
|
||||
vmov q4, q7
|
||||
teq r4, #0
|
||||
beq .Lxtsdecout
|
||||
b .Lxtsdecloop3x
|
||||
b .Lxtsdecloop4x
|
||||
.Lxtsdec1x:
|
||||
adds r4, r4, #3
|
||||
adds r4, r4, #4
|
||||
beq .Lxtsdecout
|
||||
.Lxtsdecloop:
|
||||
vld1.8 {q0}, [r1]!
|
||||
veor q0, q0, q3
|
||||
veor q0, q0, q4
|
||||
add ip, r2, #32 @ 3rd round key
|
||||
bl aes_decrypt
|
||||
veor q0, q0, q3
|
||||
veor q0, q0, q4
|
||||
vst1.8 {q0}, [r0]!
|
||||
subs r4, r4, #1
|
||||
beq .Lxtsdecout
|
||||
next_tweak q3, q3, q7, q6
|
||||
next_tweak q4, q4, q15, q6
|
||||
b .Lxtsdecloop
|
||||
.Lxtsdecout:
|
||||
vst1.8 {q3}, [r5]
|
||||
vst1.8 {q4}, [r5]
|
||||
pop {r4-r6, pc}
|
||||
ENDPROC(ce_aes_xts_decrypt)
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue