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alistair23-linux
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Merge branches 'pm-sleep', 'pm-cpuidle', 'pm-cpufreq', 'pm-devfreq' and 'pm-avs' 

* pm-sleep:
  ACPI: PM: s2idle: Rework ACPI events synchronization
  ACPI: EC: Rework flushing of pending work

* pm-cpuidle:
  cpuidle: minor Kconfig help text fixes
  cpuidle: Drop disabled field from struct cpuidle_state
  cpuidle: Fix Kconfig indentation

* pm-cpufreq:
  cpufreq: Fix Kconfig indentation

* pm-devfreq:
  PM / devfreq: Add missing locking while setting suspend_freq

* pm-avs:
  power: avs: Fix Kconfig indentation
alistair/sunxi64-5.5-dsi
Rafael J. Wysocki 2019-12-04 10:20:17 +01:00
parent 36a8015f89 024aa8732a 4d30d4a044 cde10f856a e1e047ace8 2a0efc7773
commit 1e4230f56d
13 changed files with 82 additions and 77 deletions
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8
arch/sh/kernel/cpu/shmobile/cpuidle.c
View File

@ -67,7 +67,7 @@ static struct cpuidle_driver cpuidle_driver = {
.enter = cpuidle_sleep_enter,
.name = "C2",
.desc = "SuperH Sleep Mode [SF]",
.disabled = true,
.flags = CPUIDLE_FLAG_UNUSABLE,
},
{
.exit_latency = 2300,
@ -76,7 +76,7 @@ static struct cpuidle_driver cpuidle_driver = {
.enter = cpuidle_sleep_enter,
.name = "C3",
.desc = "SuperH Mobile Standby Mode [SF]",
.disabled = true,
.flags = CPUIDLE_FLAG_UNUSABLE,
},
},
.safe_state_index = 0,
@ -86,10 +86,10 @@ static struct cpuidle_driver cpuidle_driver = {
int __init sh_mobile_setup_cpuidle(void)
{
if (sh_mobile_sleep_supported & SUSP_SH_SF)
cpuidle_driver.states[1].disabled = false;
cpuidle_driver.states[1].flags = CPUIDLE_FLAG_NONE;
if (sh_mobile_sleep_supported & SUSP_SH_STANDBY)
cpuidle_driver.states[2].disabled = false;
cpuidle_driver.states[2].flags = CPUIDLE_FLAG_NONE;
return cpuidle_register(&cpuidle_driver, NULL);
}

36
drivers/acpi/ec.c
View File

@ -533,26 +533,10 @@ static void acpi_ec_enable_event(struct acpi_ec *ec)
}
#ifdef CONFIG_PM_SLEEP
static bool acpi_ec_query_flushed(struct acpi_ec *ec)
static void __acpi_ec_flush_work(void)
{
bool flushed;
unsigned long flags;
spin_lock_irqsave(&ec->lock, flags);
flushed = !ec->nr_pending_queries;
spin_unlock_irqrestore(&ec->lock, flags);
return flushed;
}
static void __acpi_ec_flush_event(struct acpi_ec *ec)
{
/*
* When ec_freeze_events is true, we need to flush events in
* the proper position before entering the noirq stage.
*/
wait_event(ec->wait, acpi_ec_query_flushed(ec));
if (ec_query_wq)
flush_workqueue(ec_query_wq);
flush_scheduled_work(); /* flush ec->work */
flush_workqueue(ec_query_wq); /* flush queries */
}
static void acpi_ec_disable_event(struct acpi_ec *ec)
@ -562,15 +546,21 @@ static void acpi_ec_disable_event(struct acpi_ec *ec)
spin_lock_irqsave(&ec->lock, flags);
__acpi_ec_disable_event(ec);
spin_unlock_irqrestore(&ec->lock, flags);
__acpi_ec_flush_event(ec);
/*
* When ec_freeze_events is true, we need to flush events in
* the proper position before entering the noirq stage.
*/
__acpi_ec_flush_work();
}
void acpi_ec_flush_work(void)
{
if (first_ec)
__acpi_ec_flush_event(first_ec);
/* Without ec_query_wq there is nothing to flush. */
if (!ec_query_wq)
return;
flush_scheduled_work();
__acpi_ec_flush_work();
}
#endif /* CONFIG_PM_SLEEP */

26
drivers/acpi/sleep.c
View File

@ -977,6 +977,16 @@ static int acpi_s2idle_prepare_late(void)
return 0;
}
static void acpi_s2idle_sync(void)
{
/*
* The EC driver uses the system workqueue and an additional special
* one, so those need to be flushed too.
*/
acpi_ec_flush_work();
acpi_os_wait_events_complete(); /* synchronize Notify handling */
}
static void acpi_s2idle_wake(void)
{
/*
@ -1001,13 +1011,8 @@ static void acpi_s2idle_wake(void)
* should be missed by canceling the wakeup here.
*/
pm_system_cancel_wakeup();
/*
* The EC driver uses the system workqueue and an additional
* special one, so those need to be flushed too.
*/
acpi_os_wait_events_complete(); /* synchronize EC GPE processing */
acpi_ec_flush_work();
acpi_os_wait_events_complete(); /* synchronize Notify handling */
acpi_s2idle_sync();
rearm_wake_irq(acpi_sci_irq);
}
@ -1024,6 +1029,13 @@ static void acpi_s2idle_restore_early(void)
static void acpi_s2idle_restore(void)
{
/*
* Drain pending events before restoring the working-state configuration
* of GPEs.
*/
acpi_os_wait_events_complete(); /* synchronize GPE processing */
acpi_s2idle_sync();
s2idle_wakeup = false;
acpi_enable_all_runtime_gpes();

8
drivers/cpufreq/Kconfig.powerpc
View File

@ -48,9 +48,9 @@ config PPC_PASEMI_CPUFREQ
PWRficient processors.
config POWERNV_CPUFREQ
tristate "CPU frequency scaling for IBM POWERNV platform"
depends on PPC_POWERNV
default y
help
tristate "CPU frequency scaling for IBM POWERNV platform"
depends on PPC_POWERNV
default y
help
This adds support for CPU frequency switching on IBM POWERNV
platform

16
drivers/cpufreq/Kconfig.x86
View File

@ -4,17 +4,17 @@
#
config X86_INTEL_PSTATE
bool "Intel P state control"
depends on X86
select ACPI_PROCESSOR if ACPI
select ACPI_CPPC_LIB if X86_64 && ACPI && SCHED_MC_PRIO
help
This driver provides a P state for Intel core processors.
bool "Intel P state control"
depends on X86
select ACPI_PROCESSOR if ACPI
select ACPI_CPPC_LIB if X86_64 && ACPI && SCHED_MC_PRIO
help
This driver provides a P state for Intel core processors.
The driver implements an internal governor and will become
the scaling driver and governor for Sandy bridge processors.
the scaling driver and governor for Sandy bridge processors.
When this driver is enabled it will become the preferred
scaling driver for Sandy bridge processors.
scaling driver for Sandy bridge processors.
If in doubt, say N.

16
drivers/cpuidle/Kconfig
View File

@ -16,7 +16,7 @@ config CPU_IDLE
if CPU_IDLE
config CPU_IDLE_MULTIPLE_DRIVERS
bool
bool
config CPU_IDLE_GOV_LADDER
bool "Ladder governor (for periodic timer tick)"
@ -63,13 +63,13 @@ source "drivers/cpuidle/Kconfig.powerpc"
endmenu
config HALTPOLL_CPUIDLE
tristate "Halt poll cpuidle driver"
depends on X86 && KVM_GUEST
default y
help
This option enables halt poll cpuidle driver, which allows to poll
before halting in the guest (more efficient than polling in the
host via halt_poll_ns for some scenarios).
tristate "Halt poll cpuidle driver"
depends on X86 && KVM_GUEST
default y
help
This option enables halt poll cpuidle driver, which allows to poll
before halting in the guest (more efficient than polling in the
host via halt_poll_ns for some scenarios).
endif

22
drivers/cpuidle/Kconfig.arm
View File

@ -3,15 +3,15 @@
# ARM CPU Idle drivers
#
config ARM_CPUIDLE
bool "Generic ARM/ARM64 CPU idle Driver"
select DT_IDLE_STATES
bool "Generic ARM/ARM64 CPU idle Driver"
select DT_IDLE_STATES
select CPU_IDLE_MULTIPLE_DRIVERS
help
Select this to enable generic cpuidle driver for ARM.
It provides a generic idle driver whose idle states are configured
at run-time through DT nodes. The CPUidle suspend backend is
initialized by calling the CPU operations init idle hook
provided by architecture code.
help
Select this to enable generic cpuidle driver for ARM.
It provides a generic idle driver whose idle states are configured
at run-time through DT nodes. The CPUidle suspend backend is
initialized by calling the CPU operations init idle hook
provided by architecture code.
config ARM_PSCI_CPUIDLE
bool "PSCI CPU idle Driver"
@ -65,21 +65,21 @@ config ARM_U8500_CPUIDLE
bool "Cpu Idle Driver for the ST-E u8500 processors"
depends on ARCH_U8500 && !ARM64
help
Select this to enable cpuidle for ST-E u8500 processors
Select this to enable cpuidle for ST-E u8500 processors.
config ARM_AT91_CPUIDLE
bool "Cpu Idle Driver for the AT91 processors"
default y
depends on ARCH_AT91 && !ARM64
help
Select this to enable cpuidle for AT91 processors
Select this to enable cpuidle for AT91 processors.
config ARM_EXYNOS_CPUIDLE
bool "Cpu Idle Driver for the Exynos processors"
depends on ARCH_EXYNOS && !ARM64
select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
help
Select this to enable cpuidle for Exynos processors
Select this to enable cpuidle for Exynos processors.
config ARM_MVEBU_V7_CPUIDLE
bool "CPU Idle Driver for mvebu v7 family processors"

2
drivers/cpuidle/cpuidle.c
View File

@ -572,7 +572,7 @@ static int __cpuidle_register_device(struct cpuidle_device *dev)
return -EINVAL;
for (i = 0; i < drv->state_count; i++)
if (drv->states[i].disabled)
if (drv->states[i].flags & CPUIDLE_FLAG_UNUSABLE)
dev->states_usage[i].disable |= CPUIDLE_STATE_DISABLED_BY_DRIVER;
per_cpu(cpuidle_devices, dev->cpu) = dev;

1
drivers/cpuidle/poll_state.c
View File

@ -53,7 +53,6 @@ void cpuidle_poll_state_init(struct cpuidle_driver *drv)
state->target_residency_ns = 0;
state->power_usage = -1;
state->enter = poll_idle;
state->disabled = false;
state->flags = CPUIDLE_FLAG_POLLING;
}
EXPORT_SYMBOL_GPL(cpuidle_poll_state_init);

4
drivers/devfreq/devfreq.c
View File

@ -921,7 +921,9 @@ int devfreq_suspend_device(struct devfreq *devfreq)
}
if (devfreq->suspend_freq) {
mutex_lock(&devfreq->lock);
ret = devfreq_set_target(devfreq, devfreq->suspend_freq, 0);
mutex_unlock(&devfreq->lock);
if (ret)
return ret;
}
@ -949,7 +951,9 @@ int devfreq_resume_device(struct devfreq *devfreq)
return 0;
if (devfreq->resume_freq) {
mutex_lock(&devfreq->lock);
ret = devfreq_set_target(devfreq, devfreq->resume_freq, 0);
mutex_unlock(&devfreq->lock);
if (ret)
return ret;
}

6
drivers/idle/intel_idle.c
View File

@ -1291,8 +1291,8 @@ static void sklh_idle_state_table_update(void)
return;
}
skl_cstates[5].disabled = 1; /* C8-SKL */
skl_cstates[6].disabled = 1; /* C9-SKL */
skl_cstates[5].flags |= CPUIDLE_FLAG_UNUSABLE; /* C8-SKL */
skl_cstates[6].flags |= CPUIDLE_FLAG_UNUSABLE; /* C9-SKL */
}
/*
* intel_idle_state_table_update()
@ -1355,7 +1355,7 @@ static void __init intel_idle_cpuidle_driver_init(void)
continue;
/* if state marked as disabled, skip it */
if (cpuidle_state_table[cstate].disabled != 0) {
if (cpuidle_state_table[cstate].flags & CPUIDLE_FLAG_UNUSABLE) {
pr_debug("state %s is disabled\n",
cpuidle_state_table[cstate].name);
continue;

12
drivers/power/avs/Kconfig
View File

@ -13,9 +13,9 @@ menuconfig POWER_AVS
Say Y here to enable Adaptive Voltage Scaling class support.
config ROCKCHIP_IODOMAIN
tristate "Rockchip IO domain support"
depends on POWER_AVS && ARCH_ROCKCHIP && OF
help
Say y here to enable support io domains on Rockchip SoCs. It is
necessary for the io domain setting of the SoC to match the
voltage supplied by the regulators.
tristate "Rockchip IO domain support"
depends on POWER_AVS && ARCH_ROCKCHIP && OF
help
Say y here to enable support io domains on Rockchip SoCs. It is
necessary for the io domain setting of the SoC to match the
voltage supplied by the regulators.

2
include/linux/cpuidle.h
View File

@ -54,7 +54,6 @@ struct cpuidle_state {
unsigned int exit_latency; /* in US */
int power_usage; /* in mW */
unsigned int target_residency; /* in US */
bool disabled; /* disabled on all CPUs */
int (*enter) (struct cpuidle_device *dev,
struct cpuidle_driver *drv,
@ -77,6 +76,7 @@ struct cpuidle_state {
#define CPUIDLE_FLAG_POLLING BIT(0) /* polling state */
#define CPUIDLE_FLAG_COUPLED BIT(1) /* state applies to multiple cpus */
#define CPUIDLE_FLAG_TIMER_STOP BIT(2) /* timer is stopped on this state */
#define CPUIDLE_FLAG_UNUSABLE BIT(3) /* avoid using this state */
struct cpuidle_device_kobj;
struct cpuidle_state_kobj;