docs: packing: move it to core-api book and adjust markups
The packing.txt file was misplaced, as docs should be part of
a documentation book, and not at the root dir.
So, move it to the core-api directory and add to its index.
Also, ensure that the file will be properly parsed and the bitmap
ascii artwork will use a monotonic font.
Fixes: 554aae3500 ("lib: Add support for generic packing operations")
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Tested-by: Vladimir Oltean <olteanv@gmail.com>
Reviewed-by: Mike Rapoport <rppt@linux.ibm.com>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
alistair/sunxi64-5.4-dsi
Mauro Carvalho Chehab
Jonathan Corbet
parent
f6ae22d644
commit
1ec779b9fa
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@ -25,6 +25,7 @@ Core utilities
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librs
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librs
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genalloc
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genalloc
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errseq
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errseq
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packing
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printk-formats
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printk-formats
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circular-buffers
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circular-buffers
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generic-radix-tree
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generic-radix-tree
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@ -30,6 +30,7 @@ The solution
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------------
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------------
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This API deals with 2 basic operations:
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This API deals with 2 basic operations:
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- Packing a CPU-usable number into a memory buffer (with hardware
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- Packing a CPU-usable number into a memory buffer (with hardware
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constraints/quirks)
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constraints/quirks)
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- Unpacking a memory buffer (which has hardware constraints/quirks)
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- Unpacking a memory buffer (which has hardware constraints/quirks)
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@ -49,10 +50,12 @@ What the examples show is where the logical bytes and bits sit.
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1. Normally (no quirks), we would do it like this:
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1. Normally (no quirks), we would do it like this:
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63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
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::
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7 6 5 4
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31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
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3 2 1 0
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7 6 5 4
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31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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3 2 1 0
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That is, the MSByte (7) of the CPU-usable u64 sits at memory offset 0, and the
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That is, the MSByte (7) of the CPU-usable u64 sits at memory offset 0, and the
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LSByte (0) of the u64 sits at memory offset 7.
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LSByte (0) of the u64 sits at memory offset 7.
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@ -63,10 +66,12 @@ comments as "logical" notation.
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2. If QUIRK_MSB_ON_THE_RIGHT is set, we do it like this:
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2. If QUIRK_MSB_ON_THE_RIGHT is set, we do it like this:
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56 57 58 59 60 61 62 63 48 49 50 51 52 53 54 55 40 41 42 43 44 45 46 47 32 33 34 35 36 37 38 39
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::
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7 6 5 4
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24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
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56 57 58 59 60 61 62 63 48 49 50 51 52 53 54 55 40 41 42 43 44 45 46 47 32 33 34 35 36 37 38 39
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3 2 1 0
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7 6 5 4
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24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
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3 2 1 0
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That is, QUIRK_MSB_ON_THE_RIGHT does not affect byte positioning, but
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That is, QUIRK_MSB_ON_THE_RIGHT does not affect byte positioning, but
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inverts bit offsets inside a byte.
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inverts bit offsets inside a byte.
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@ -74,10 +79,12 @@ inverts bit offsets inside a byte.
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3. If QUIRK_LITTLE_ENDIAN is set, we do it like this:
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3. If QUIRK_LITTLE_ENDIAN is set, we do it like this:
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39 38 37 36 35 34 33 32 47 46 45 44 43 42 41 40 55 54 53 52 51 50 49 48 63 62 61 60 59 58 57 56
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::
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4 5 6 7
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7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
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39 38 37 36 35 34 33 32 47 46 45 44 43 42 41 40 55 54 53 52 51 50 49 48 63 62 61 60 59 58 57 56
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0 1 2 3
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4 5 6 7
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7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
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0 1 2 3
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Therefore, QUIRK_LITTLE_ENDIAN means that inside the memory region, every
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Therefore, QUIRK_LITTLE_ENDIAN means that inside the memory region, every
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byte from each 4-byte word is placed at its mirrored position compared to
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byte from each 4-byte word is placed at its mirrored position compared to
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@ -86,18 +93,22 @@ the boundary of that word.
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4. If QUIRK_MSB_ON_THE_RIGHT and QUIRK_LITTLE_ENDIAN are both set, we do it
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4. If QUIRK_MSB_ON_THE_RIGHT and QUIRK_LITTLE_ENDIAN are both set, we do it
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like this:
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like this:
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32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
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::
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4 5 6 7
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0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
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32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
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0 1 2 3
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4 5 6 7
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0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
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0 1 2 3
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5. If just QUIRK_LSW32_IS_FIRST is set, we do it like this:
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5. If just QUIRK_LSW32_IS_FIRST is set, we do it like this:
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31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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::
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3 2 1 0
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63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
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31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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7 6 5 4
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3 2 1 0
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63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
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7 6 5 4
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In this case the 8 byte memory region is interpreted as follows: first
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In this case the 8 byte memory region is interpreted as follows: first
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4 bytes correspond to the least significant 4-byte word, next 4 bytes to
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4 bytes correspond to the least significant 4-byte word, next 4 bytes to
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@ -107,28 +118,34 @@ the more significant 4-byte word.
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6. If QUIRK_LSW32_IS_FIRST and QUIRK_MSB_ON_THE_RIGHT are set, we do it like
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6. If QUIRK_LSW32_IS_FIRST and QUIRK_MSB_ON_THE_RIGHT are set, we do it like
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this:
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this:
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24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
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::
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3 2 1 0
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56 57 58 59 60 61 62 63 48 49 50 51 52 53 54 55 40 41 42 43 44 45 46 47 32 33 34 35 36 37 38 39
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24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
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7 6 5 4
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3 2 1 0
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56 57 58 59 60 61 62 63 48 49 50 51 52 53 54 55 40 41 42 43 44 45 46 47 32 33 34 35 36 37 38 39
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7 6 5 4
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7. If QUIRK_LSW32_IS_FIRST and QUIRK_LITTLE_ENDIAN are set, it looks like
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7. If QUIRK_LSW32_IS_FIRST and QUIRK_LITTLE_ENDIAN are set, it looks like
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this:
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this:
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7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
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::
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0 1 2 3
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39 38 37 36 35 34 33 32 47 46 45 44 43 42 41 40 55 54 53 52 51 50 49 48 63 62 61 60 59 58 57 56
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7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
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4 5 6 7
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0 1 2 3
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39 38 37 36 35 34 33 32 47 46 45 44 43 42 41 40 55 54 53 52 51 50 49 48 63 62 61 60 59 58 57 56
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4 5 6 7
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8. If QUIRK_LSW32_IS_FIRST, QUIRK_LITTLE_ENDIAN and QUIRK_MSB_ON_THE_RIGHT
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8. If QUIRK_LSW32_IS_FIRST, QUIRK_LITTLE_ENDIAN and QUIRK_MSB_ON_THE_RIGHT
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are set, it looks like this:
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are set, it looks like this:
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0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
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::
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0 1 2 3
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32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
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0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
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4 5 6 7
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0 1 2 3
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32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
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4 5 6 7
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We always think of our offsets as if there were no quirk, and we translate
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We always think of our offsets as if there were no quirk, and we translate
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@ -12099,7 +12099,7 @@ L: netdev@vger.kernel.org
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S: Supported
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S: Supported
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F: lib/packing.c
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F: lib/packing.c
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F: include/linux/packing.h
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F: include/linux/packing.h
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F: Documentation/packing.txt
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F: Documentation/core-api/packing.rst
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PADATA PARALLEL EXECUTION MECHANISM
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PADATA PARALLEL EXECUTION MECHANISM
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M: Steffen Klassert <steffen.klassert@secunet.com>
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M: Steffen Klassert <steffen.klassert@secunet.com>
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