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powerpc/spufs: remove class_0_dsisr from spu exception handling 

According to the CBEA, the SPU dsisr is not updated for class 0
exceptions.

spu_stopped() is testing the dsisr that was passed to it from the class
0 exception handler, so we return a false positive here.

This patch cleans up the interrupt handler and erroneous tests in
spu_stopped. It also removes the fields from the csa since it is not
needed to process class 0 events.

Signed-off-by: Luke Browning <lukebrowning@us.ibm.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
hifive-unleashed-5.1
Luke Browning 2008-06-05 17:30:25 +08:00 committed by Jeremy Kerr
parent d84050f48e
commit 1f64643aa5
5 changed files with 1 additions and 10 deletions
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2
arch/powerpc/platforms/cell/spu_base.c
View File

@ -324,14 +324,12 @@ spu_irq_class_0(int irq, void *data)
stat = spu_int_stat_get(spu, 0) & mask;
spu->class_0_pending |= stat;
spu->class_0_dsisr = spu_mfc_dsisr_get(spu);
spu->class_0_dar = spu_mfc_dar_get(spu);
spin_unlock(&spu->register_lock);
spu->stop_callback(spu, 0);
spu->class_0_pending = 0;
spu->class_0_dsisr = 0;
spu->class_0_dar = 0;
spu_int_stat_clear(spu, 0, stat);

5
arch/powerpc/platforms/cell/spufs/run.c
View File

@ -27,7 +27,6 @@ void spufs_stop_callback(struct spu *spu, int irq)
switch(irq) {
case 0 :
ctx->csa.class_0_pending = spu->class_0_pending;
ctx->csa.class_0_dsisr = spu->class_0_dsisr;
ctx->csa.class_0_dar = spu->class_0_dar;
break;
case 1 :
@ -69,10 +68,6 @@ top:
if (test_bit(SPU_SCHED_NOTIFY_ACTIVE, &ctx->sched_flags))
return 1;
dsisr = ctx->csa.class_0_dsisr;
if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED))
return 1;
dsisr = ctx->csa.class_1_dsisr;
if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED))
return 1;

1
arch/powerpc/xmon/xmon.c
View File

@ -2844,7 +2844,6 @@ static void dump_spu_fields(struct spu *spu)
DUMP_FIELD(spu, "0x%lx", flags);
DUMP_FIELD(spu, "%d", class_0_pending);
DUMP_FIELD(spu, "0x%lx", class_0_dar);
DUMP_FIELD(spu, "0x%lx", class_0_dsisr);
DUMP_FIELD(spu, "0x%lx", class_1_dar);
DUMP_FIELD(spu, "0x%lx", class_1_dsisr);
DUMP_FIELD(spu, "0x%lx", irqs[0]);

1
include/asm-powerpc/spu.h
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@ -131,7 +131,6 @@ struct spu {
u64 flags;
u64 class_0_pending;
u64 class_0_dar;
u64 class_0_dsisr;
u64 class_1_dar;
u64 class_1_dsisr;
size_t ls_size;

2
include/asm-powerpc/spu_csa.h
View File

@ -254,7 +254,7 @@ struct spu_state {
u64 spu_chnldata_RW[32];
u32 spu_mailbox_data[4];
u32 pu_mailbox_data[1];
u64 class_0_dar, class_0_dsisr, class_0_pending;
u64 class_0_dar, class_0_pending;
u64 class_1_dar, class_1_dsisr;
unsigned long suspend_time;
spinlock_t register_lock;