x86, pvops: Remove hooks for {rd,wr}msr_safe_regs
There were paravirt_ops hooks for the full register set variant of
{rd,wr}msr_safe which are actually not used by anyone anymore. Remove
them to make the code cleaner and avoid silent breakages when the pvops
members were uninitialized. This has been boot-tested natively and under
Xen with PVOPS enabled and disabled on one machine.
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
Link: http://lkml.kernel.org/r/1338562358-28182-2-git-send-email-bp@amd64.org
Acked-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
hifive-unleashed-5.1
Andre Przywara
H. Peter Anvin
parent
f8f5701bda
commit
1f975f78c8
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@ -115,8 +115,8 @@ notrace static inline int native_write_msr_safe(unsigned int msr,
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extern unsigned long long native_read_tsc(void);
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extern int native_rdmsr_safe_regs(u32 regs[8]);
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extern int native_wrmsr_safe_regs(u32 regs[8]);
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extern int rdmsr_safe_regs(u32 regs[8]);
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extern int wrmsr_safe_regs(u32 regs[8]);
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static __always_inline unsigned long long __native_read_tsc(void)
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{
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@ -187,43 +187,6 @@ static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
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return err;
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}
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static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
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{
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u32 gprs[8] = { 0 };
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int err;
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gprs[1] = msr;
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gprs[7] = 0x9c5a203a;
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err = native_rdmsr_safe_regs(gprs);
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*p = gprs[0] | ((u64)gprs[2] << 32);
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return err;
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}
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static inline int wrmsrl_amd_safe(unsigned msr, unsigned long long val)
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{
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u32 gprs[8] = { 0 };
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gprs[0] = (u32)val;
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gprs[1] = msr;
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gprs[2] = val >> 32;
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gprs[7] = 0x9c5a203a;
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return native_wrmsr_safe_regs(gprs);
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}
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static inline int rdmsr_safe_regs(u32 regs[8])
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{
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return native_rdmsr_safe_regs(regs);
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}
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static inline int wrmsr_safe_regs(u32 regs[8])
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{
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return native_wrmsr_safe_regs(regs);
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}
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#define rdtscl(low) \
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((low) = (u32)__native_read_tsc())
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@ -248,6 +211,32 @@ do { \
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#endif /* !CONFIG_PARAVIRT */
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static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
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{
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u32 gprs[8] = { 0 };
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int err;
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gprs[1] = msr;
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gprs[7] = 0x9c5a203a;
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err = rdmsr_safe_regs(gprs);
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*p = gprs[0] | ((u64)gprs[2] << 32);
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return err;
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}
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static inline int wrmsrl_amd_safe(unsigned msr, unsigned long long val)
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{
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u32 gprs[8] = { 0 };
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gprs[0] = (u32)val;
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gprs[1] = msr;
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gprs[2] = val >> 32;
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gprs[7] = 0x9c5a203a;
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return wrmsr_safe_regs(gprs);
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}
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#define checking_wrmsrl(msr, val) wrmsr_safe((msr), (u32)(val), \
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(u32)((val) >> 32))
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@ -128,21 +128,11 @@ static inline u64 paravirt_read_msr(unsigned msr, int *err)
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return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
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}
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static inline int paravirt_rdmsr_regs(u32 *regs)
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{
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return PVOP_CALL1(int, pv_cpu_ops.rdmsr_regs, regs);
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}
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static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
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{
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return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
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}
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static inline int paravirt_wrmsr_regs(u32 *regs)
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{
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return PVOP_CALL1(int, pv_cpu_ops.wrmsr_regs, regs);
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}
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/* These should all do BUG_ON(_err), but our headers are too tangled. */
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#define rdmsr(msr, val1, val2) \
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do { \
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@ -176,9 +166,6 @@ do { \
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_err; \
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})
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#define rdmsr_safe_regs(regs) paravirt_rdmsr_regs(regs)
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#define wrmsr_safe_regs(regs) paravirt_wrmsr_regs(regs)
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static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
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{
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int err;
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@ -186,32 +173,6 @@ static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
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*p = paravirt_read_msr(msr, &err);
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return err;
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}
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static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
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{
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u32 gprs[8] = { 0 };
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int err;
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gprs[1] = msr;
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gprs[7] = 0x9c5a203a;
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err = paravirt_rdmsr_regs(gprs);
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*p = gprs[0] | ((u64)gprs[2] << 32);
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return err;
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}
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static inline int wrmsrl_amd_safe(unsigned msr, unsigned long long val)
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{
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u32 gprs[8] = { 0 };
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gprs[0] = (u32)val;
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gprs[1] = msr;
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gprs[2] = val >> 32;
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gprs[7] = 0x9c5a203a;
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return paravirt_wrmsr_regs(gprs);
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}
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static inline u64 paravirt_read_tsc(void)
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{
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@ -153,9 +153,7 @@ struct pv_cpu_ops {
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/* MSR, PMC and TSR operations.
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err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
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u64 (*read_msr)(unsigned int msr, int *err);
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int (*rdmsr_regs)(u32 *regs);
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int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
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int (*wrmsr_regs)(u32 *regs);
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u64 (*read_tsc)(void);
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u64 (*read_pmc)(int counter);
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@ -352,9 +352,7 @@ struct pv_cpu_ops pv_cpu_ops = {
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#endif
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.wbinvd = native_wbinvd,
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.read_msr = native_read_msr_safe,
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.rdmsr_regs = native_rdmsr_safe_regs,
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.write_msr = native_write_msr_safe,
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.wrmsr_regs = native_wrmsr_safe_regs,
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.read_tsc = native_read_tsc,
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.read_pmc = native_read_pmc,
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.read_tscp = native_read_tscp,
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@ -1,5 +1,5 @@
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#include <linux/module.h>
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#include <asm/msr.h>
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EXPORT_SYMBOL(native_rdmsr_safe_regs);
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EXPORT_SYMBOL(native_wrmsr_safe_regs);
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EXPORT_SYMBOL(rdmsr_safe_regs);
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EXPORT_SYMBOL(wrmsr_safe_regs);
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@ -6,13 +6,13 @@
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#ifdef CONFIG_X86_64
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/*
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* int native_{rdmsr,wrmsr}_safe_regs(u32 gprs[8]);
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* int {rdmsr,wrmsr}_safe_regs(u32 gprs[8]);
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*
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* reg layout: u32 gprs[eax, ecx, edx, ebx, esp, ebp, esi, edi]
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*
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*/
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.macro op_safe_regs op
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ENTRY(native_\op\()_safe_regs)
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ENTRY(\op\()_safe_regs)
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CFI_STARTPROC
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pushq_cfi %rbx
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pushq_cfi %rbp
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@ -45,13 +45,13 @@ ENTRY(native_\op\()_safe_regs)
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_ASM_EXTABLE(1b, 3b)
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CFI_ENDPROC
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ENDPROC(native_\op\()_safe_regs)
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ENDPROC(\op\()_safe_regs)
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.endm
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#else /* X86_32 */
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.macro op_safe_regs op
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ENTRY(native_\op\()_safe_regs)
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ENTRY(\op\()_safe_regs)
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CFI_STARTPROC
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pushl_cfi %ebx
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pushl_cfi %ebp
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@ -92,7 +92,7 @@ ENTRY(native_\op\()_safe_regs)
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_ASM_EXTABLE(1b, 3b)
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CFI_ENDPROC
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ENDPROC(native_\op\()_safe_regs)
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ENDPROC(\op\()_safe_regs)
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.endm
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#endif
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@ -1116,9 +1116,7 @@ static const struct pv_cpu_ops xen_cpu_ops __initconst = {
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.wbinvd = native_wbinvd,
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.read_msr = native_read_msr_safe,
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.rdmsr_regs = native_rdmsr_safe_regs,
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.write_msr = xen_write_msr_safe,
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.wrmsr_regs = native_wrmsr_safe_regs,
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.read_tsc = native_read_tsc,
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.read_pmc = native_read_pmc,
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