metag: perf: don't reset TXTACTCYC
The thread active cycle counter TXTACTCYC is used in __delay so it shouldn't really be reset to zero by perf. Fix perf to just read the value, and instead of clearing it, record the prev_count value in enable_counter so that the delta calculations know about the previous value. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Paul Mackerras <paulus@samba.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
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@ -617,9 +617,7 @@ static void metag_pmu_enable_counter(struct hw_perf_event *event, int idx)
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WARN_ONCE((config != 0x100),
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"invalid configuration (%d) for counter (%d)\n",
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config, idx);
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/* Reset the cycle count */
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__core_reg_set(TXTACTCYC, 0);
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local64_set(&event->prev_count, __core_reg_get(TXTACTCYC));
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goto unlock;
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}
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@ -708,9 +706,8 @@ static u64 metag_pmu_read_counter(int idx)
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{
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u32 tmp = 0;
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/* The act of reading the cycle counter also clears it */
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if (METAG_INST_COUNTER == idx) {
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__core_reg_swap(TXTACTCYC, tmp);
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tmp = __core_reg_get(TXTACTCYC);
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goto out;
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}
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