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net: ethernet: mvneta: Add 2500BaseX support for SoCs without comphy 

[ Upstream commit 1a642ca7f3 ]

The older SoCs like Armada XP support a 2500BaseX mode in the datasheets
referred to as DR-SGMII (Double rated SGMII) or HS-SGMII (High Speed
SGMII). This is an upclocked 1000BaseX mode, thus
PHY_INTERFACE_MODE_2500BASEX is the appropriate mode define for it.
adding support for it merely means writing the correct magic value into
the MVNETA_SERDES_CFG register.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
5.4-rM2-2.2.x-imx-squashed
Sascha Hauer 2020-06-16 10:31:40 +02:00 committed by Greg Kroah-Hartman
parent 996bd0778a
commit 203cfe694e
1 changed files with 6 additions and 0 deletions
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6
drivers/net/ethernet/marvell/mvneta.c
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@ -108,6 +108,7 @@
#define MVNETA_SERDES_CFG 0x24A0
#define MVNETA_SGMII_SERDES_PROTO 0x0cc7
#define MVNETA_QSGMII_SERDES_PROTO 0x0667
#define MVNETA_HSGMII_SERDES_PROTO 0x1107
#define MVNETA_TYPE_PRIO 0x24bc
#define MVNETA_FORCE_UNI BIT(21)
#define MVNETA_TXQ_CMD_1 0x24e4
@ -3199,6 +3200,11 @@ static int mvneta_config_interface(struct mvneta_port *pp,
mvreg_write(pp, MVNETA_SERDES_CFG,
MVNETA_SGMII_SERDES_PROTO);
break;
case PHY_INTERFACE_MODE_2500BASEX:
mvreg_write(pp, MVNETA_SERDES_CFG,
MVNETA_HSGMII_SERDES_PROTO);
break;
default:
return -EINVAL;
}