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mmc: host: tmio: SDIO_STATUS_QUIRK is rather SDIO_STATUS_SETBITS

QUIRK sounds like there is something wrong, but actually there are just
some bits which need to be 1. Rename it to be more clear.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
hifive-unleashed-5.1
Wolfram Sang 2017-01-19 21:07:17 +01:00 committed by Ulf Hansson
parent e4f38eb18a
commit 20dd03734c
3 changed files with 5 additions and 9 deletions

View File

@ -641,10 +641,8 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev)
*/
mmc_data->flags |= TMIO_MMC_HAVE_CMD12_CTRL;
/*
* All SDHI need SDIO_INFO1 reserved bit
*/
mmc_data->flags |= TMIO_MMC_SDIO_STATUS_QUIRK;
/* All SDHI have SDIO status bits which must be 1 */
mmc_data->flags |= TMIO_MMC_SDIO_STATUS_SETBITS;
ret = tmio_mmc_host_probe(host, mmc_data);
if (ret < 0)

View File

@ -723,7 +723,7 @@ static void __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
sdio_status = status & ~TMIO_SDIO_MASK_ALL;
if (pdata->flags & TMIO_MMC_SDIO_STATUS_QUIRK)
if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
sdio_status |= 6;
sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);

View File

@ -94,10 +94,8 @@
*/
#define TMIO_MMC_HAVE_CMD12_CTRL (1 << 7)
/*
* Some controllers needs to set 1 on SDIO status reserved bits
*/
#define TMIO_MMC_SDIO_STATUS_QUIRK (1 << 8)
/* Controller has some SDIO status bits which must be 1 */
#define TMIO_MMC_SDIO_STATUS_SETBITS (1 << 8)
/*
* Some controllers have a 32-bit wide data port register