V4L/DVB: V4L: dm644x_ccdc: Add 10bit BT support
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Muralidharan Karicheri <mkaricheri@gmail.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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085b54a24f
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@ -400,7 +400,11 @@ void ccdc_config_ycbcr(void)
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* configure the FID, VD, HD pin polarity,
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* fld,hd pol positive, vd negative, 8-bit data
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*/
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syn_mode |= CCDC_SYN_MODE_VD_POL_NEGATIVE | CCDC_SYN_MODE_8BITS;
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syn_mode |= CCDC_SYN_MODE_VD_POL_NEGATIVE;
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if (ccdc_cfg.if_type == VPFE_BT656_10BIT)
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syn_mode |= CCDC_SYN_MODE_10BITS;
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else
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syn_mode |= CCDC_SYN_MODE_8BITS;
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} else {
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/* y/c external sync mode */
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syn_mode |= (((params->fid_pol & CCDC_FID_POL_MASK) <<
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@ -419,8 +423,13 @@ void ccdc_config_ycbcr(void)
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* configure the order of y cb cr in SDRAM, and disable latch
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* internal register on vsync
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*/
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regw((params->pix_order << CCDC_CCDCFG_Y8POS_SHIFT) |
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CCDC_LATCH_ON_VSYNC_DISABLE, CCDC_CCDCFG);
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if (ccdc_cfg.if_type == VPFE_BT656_10BIT)
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regw((params->pix_order << CCDC_CCDCFG_Y8POS_SHIFT) |
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CCDC_LATCH_ON_VSYNC_DISABLE | CCDC_CCDCFG_BW656_10BIT,
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CCDC_CCDCFG);
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else
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regw((params->pix_order << CCDC_CCDCFG_Y8POS_SHIFT) |
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CCDC_LATCH_ON_VSYNC_DISABLE, CCDC_CCDCFG);
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/*
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* configure the horizontal line offset. This should be a
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@ -826,6 +835,7 @@ static int ccdc_set_hw_if_params(struct vpfe_hw_if_param *params)
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case VPFE_BT656:
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case VPFE_YCBCR_SYNC_16:
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case VPFE_YCBCR_SYNC_8:
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case VPFE_BT656_10BIT:
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ccdc_cfg.ycbcr.vd_pol = params->vdpol;
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ccdc_cfg.ycbcr.hd_pol = params->hdpol;
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break;
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@ -135,11 +135,19 @@
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#define CCDC_SYN_MODE_INPMOD_SHIFT 12
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#define CCDC_SYN_MODE_INPMOD_MASK 3
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#define CCDC_SYN_MODE_8BITS (7 << 8)
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#define CCDC_SYN_MODE_10BITS (6 << 8)
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#define CCDC_SYN_MODE_11BITS (5 << 8)
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#define CCDC_SYN_MODE_12BITS (4 << 8)
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#define CCDC_SYN_MODE_13BITS (3 << 8)
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#define CCDC_SYN_MODE_14BITS (2 << 8)
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#define CCDC_SYN_MODE_15BITS (1 << 8)
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#define CCDC_SYN_MODE_16BITS (0 << 8)
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#define CCDC_SYN_FLDMODE_MASK 1
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#define CCDC_SYN_FLDMODE_SHIFT 7
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#define CCDC_REC656IF_BT656_EN 3
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#define CCDC_SYN_MODE_VD_POL_NEGATIVE (1 << 2)
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#define CCDC_CCDCFG_Y8POS_SHIFT 11
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#define CCDC_CCDCFG_BW656_10BIT (1 << 5)
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#define CCDC_SDOFST_FIELD_INTERLEAVED 0x249
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#define CCDC_NO_CULLING 0xffff00ff
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#endif
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